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Method and circuit of accelerated operation of pooling layer of neural network

A neural network and accelerated computing technology, applied in the field of accelerated computing of the pooling layer of neural networks, can solve the problems of large computational load of neural networks and reduce chip area, achieve high computing throughput, reduce chip area, and improve reuse efficiency Effect

Active Publication Date: 2018-11-06
FUDAN UNIV
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AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to solve the problem of large amount of calculation in neural networks, and provide a highly efficient method and circuit for accelerating pooling layer operations, so as to improve hardware multiplexing efficiency and reduce chip area
This can avoid the problems of traditional algorithms requiring on-chip cache, complex control circuits, and redundant operations.

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  • Method and circuit of accelerated operation of pooling layer of neural network
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  • Method and circuit of accelerated operation of pooling layer of neural network

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Embodiment Construction

[0036] In the present invention, the basic block diagram of the circuit of high-efficiency accelerated pooling operation is as follows figure 1 shown. The design works as follows:

[0037] The input feature layers for the pooling operation are stored in external memory (DRAM). First, the layer segmentation module will divide the layer according to the width direction according to the width information of the input layer, so that the divided layer can be put into the vertical pooling operation module for operation (the vertical pooling operation module There is a limit to the maximum width of the layer, so input layers that are particularly large in the width direction need to be split). The division here is only a logical division, and does not require additional operations on the input layer, but only affects the order in which the data in the DRAM is read. The layer segmentation module will send the data stream of the input features after segmentation to the horizontal p...

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Abstract

The invention belongs to the technical field of integrated-circuit design, and particularly relates to a method and a circuit of accelerated operation of a pooling layer of a neural network. The method is to decompose two-dimensional pooling operation into two times of one-dimensional pooling operation of one-dimensional pooling operation of a width direction and one-dimensional pooling operationof a height direction. A circuit structure includes five parts including a graph layer segmentation module used for graph layer segmentation and data reading, a horizontal-pooling-operation module used for pooling operation of the width direction, a vertical-pooling-operation module used for pooling operation of the height direction and an output control module responsible for data writing-back. Compared with traditional methods, the method of the invention reduces calculation quantity; all modules in the circuit process data stream, thus too many on-chip buffers are not needed for storing temporary results, and chip areas are saved; and at the same time, the circuit uses a systolic array structure, all hardware units in each clock cycle are enabled to be all in a working state, a hardwareunit use rate is increased, and thus working efficiency of the circuit is improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a method and a circuit for accelerating operation of a pooling layer of a neural network. Background technique [0002] In the 1960s, Hubel and others proposed the concept of receptive field through the study of cat visual cortical cells. In the 1980s, Fukushima proposed the concept of neurocognitive machine based on the concept of receptive field, which can be regarded as The first implementation of the convolutional neural network, the neurocognitive machine decomposes a visual pattern into many sub-patterns (features), and then enters the hierarchically connected feature plane for processing. It attempts to model the visual system. It enables it to complete the recognition even when the object is displaced or slightly deformed. [0003] Convolutional Neural Networks are a variant of Multilayer Perceptrons. It was developed from the early work of...

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Application Information

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IPC IPC(8): G06F17/50G06N3/02
CPCG06N3/02G06F30/39
Inventor 韩军蔡宇杰曾晓洋
Owner FUDAN UNIV
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