A planarization simulation method and system for shallow trench isolation of finfet devices

Abstract

The invention discloses a planarization simulation method for shallow trench isolation of a FinFET device, comprising: dividing the chip layout into grids, extracting layout characteristic parameters in the grids respectively; obtaining the chip deposition surface height after oxide deposition Model to provide the initial surface topography height of the chip, the chip deposition surface height model is related to the layout feature parameters; obtain the pattern density in the grid after oxide deposition; according to the pattern density in the grid after deposition and The characteristic correlation length is used to obtain the effective density of the graphics in the grid; the contact pressure distribution in the grid of the chip surface is obtained; according to the effective density of the graphics in the grid and the contact pressure distribution, the grinding and removal rate model of the chip is established; the initial surface of the chip is used to The topography height is the initial value, and the surface topography simulation of the chip is carried out according to the relationship between the topography height of the chip and the grinding removal rate equation. The invention can meet the requirement of flattening simulation of FinFET device shallow trench isolation.

Description

technical field [0001] The invention relates to the field of integrated circuit design and manufacture, in particular to a planarization simulation method and system for shallow trench isolation of FinFET devices. Background technique [0002] With the continuous development of integrated circuit technology, the requirements for integration are getting higher and higher. After entering the 16nm process node, the non-planar fin field effect transistor (Fin Field Effect Transistor, FinFET) structure is generally adopted in the industry. [0003] In the manufacturing process of FinFET, shallow trench isolation is formed between fins (Fin). In the formation step of shallow trench isolation, it is necessary to perform CMP after depositing silicon nitride (SiN) and oxide (Oxide). (chemical mechanical planarization), in the planarization process, SiN depression is a common problem, which will affect the height and shape of the fin, and directly affect the performance of the device ...

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a flattening simulation method and system for shallow trench isolation of FinFET devices, in order to solve the shortcomings existing in the existing FinFET CMP simulation

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