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Any radar waveform on-line design method based on FPGA

A design method and radar waveform technology, applied in radio wave measurement systems, instruments, etc., can solve the problems that algorithms cannot be processed in real time, reduce processing speed, etc., and achieve the effect of reducing hardware consumption, reducing processing delay and rational utilization

Inactive Publication Date: 2018-11-30
THE 724TH RES INST OF CHINA SHIPBUILDING IND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the overlap-and-add method needs to add N zeros to the processed data, which reduces the processing speed and forms the delay interval of the data flow, which makes the algorithm unable to perform real-time pipeline processing.

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  • Any radar waveform on-line design method based on FPGA
  • Any radar waveform on-line design method based on FPGA
  • Any radar waveform on-line design method based on FPGA

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Embodiment Construction

[0024] The present invention will be further described below in combination with specific embodiments and accompanying drawings.

[0025] 1) The schematic diagram of the overall structure of the invention is as follows figure 1 As shown, it includes the transmitting channel and receiving channel of the radar, and realizes the generation of arbitrary waveform and the pulse compression processing of the corresponding waveform echo.

[0026] 2) As attached figure 2 As shown, the host computer sends the zero-frequency IQ data X(n) to the FPGA through the network port, and the FPGA stores the zero-frequency IQ data of the transmitted waveform into the RAM, and reads the data in the RAM in the next radar cycle and passes the up-conversion module To the intermediate frequency, it is converted into an analog signal by DA, the signal passes through TR, and the antenna is emitted.

[0027] 3) As attached image 3 As shown, the AD converter collects the down-converted analog signal o...

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Abstract

The invention provides an any radar waveform on-line design method based on an FPGA. An upper computer 101 generates zero frequency signal waveform data according to set radar waveform parameters, andsends the zero frequency signal waveform data to a transmitted waveform memory 102 through a network, data of the transmitted waveform memory 102 are elevated to a medium frequency emission signal through an upper frequency conversion module 103 to be output to a radar emission module, and arbitrary waveform generation is achieved. The upper computer 101 generates frequency domain data of pulse compression coefficients to be stored into a pulse compression coefficient memory 104 through the network, a pulse compression module 105 conducts pulse compression on the radar echo according to a value of the pulse compression coefficient memory 104, wherein the pulse compression module uses a structure-optimized frequency domain pulse compression algorithm, hardware consumption is lowered, and pulse compression is completed in low-delay and high-throughput modes.

Description

technical field [0001] The invention relates to the technical field of radar signal processing, in particular to a radar waveform online modification design method. Background technique [0002] Traditional radar transmission waveform design needs to be optimized according to application requirements and scene design, pulse width, signal bandwidth, and signal form are generally fixed. However, depending on the actual radar installation site and the different application requirements of the same radar (such as ocean wave measurement, oil spill detection), the fixed transmission waveform design often cannot meet all application requirements. In some installation sites, such as radars with blind filling pulses, if the installation site is far away from the area to be observed, the blind filling pulses are not only useless, but also occupy the transmission timing. At this time, the fixed transmission waveform cannot reasonably use the radar energy and give full play to the rada...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01S7/282G01S7/02
CPCG01S7/02G01S7/282
Inventor 周骏丁友峰王曙曜宋凯
Owner THE 724TH RES INST OF CHINA SHIPBUILDING IND