Real-time simulation modeling method for half-bridge and full-bridge type modular multilevel converter

Abstract

The invention discloses a real-time simulation modeling method for a half-bridge and full-bridge type modular multilevel converter. The method particularly comprises the steps of MMC circuit model segmentation, decoupling delay error compensation and building of detailed and simplified numerical models of sub-modules. An MMC circuit is subjected to circuit model segmentation by adopting an ideal transformer model method, segmented models contain a bridge type main circuit model and various bridge arm sub-module numerical models, an excitation current in the sub-module numerical models adopts avalue obtained after a bridge arm current in a main circuit is subjected to interpolation prediction processing, and the sub-module numerical models contain half-bridge electromagnetic transient detailed and simplified numerical models and full-bridge electromagnetic transient detailed and simplified numerical models and can be selected according to the requirements such as the simulation precision and the simulation scale. According to the method, electromagnetic transient real-time simulation of the large-scale MMC can be achieved, the higher simulation precision and the better stability are achieved compared with an integrated circuit model in common simulation software, and a hardware-in-the-loop simulation verification function on multiple aspects such as the capacitor voltage balance sort and a control strategy can be achieved.

Description

technical field [0001] The invention relates to a real-time simulation modeling method for half-bridge and full-bridge modular multilevel converters, and belongs to the field of modeling and simulation of electric power systems. Background technique [0002] Modular multilevel converter (MMC) has been more and more used in the field of flexible DC transmission due to its many advantages such as unbalanced operation capability, fault ride-through capability and low switching loss. However, in practical engineering applications, it is usually necessary to test and verify the feasibility and effectiveness of its hardware equipment and control systems. Among them, the hardware-in-the-loop test is an efficient test method to verify the control and protection strategy, which requires that the electromagnetic transient simulation of the main circuit including MMC can be synchronized with the real clock. However, MMC contains a large number of power electronic switching devices, an...

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Problems solved by technology

Both use FPGA to complete the real-time simulation modeling of the valve body, but for the same number of sub-modules, RTDS requires more FPGA resources than RT-LAB

The SSN algorithm adopted by RT-LAB needs to pre-calculate the Thevenin or Norton equivalent circuit of each segmented network, and it is difficult to realize the universal program of the equivalent circuit pre-calculation and the overall associated circuit solution

The TLM interface algorithm adopted by RTDS needs to adjust and calculate the parameter values ​​of additional circuits according to different circuit parameters, and the valve control circuit based on the L / RC model requires a small simulation step size, so it is not suitable for multi-CPU core parallel simulation Way

On the other hand, since RT-LAB and RTDS are commercial real-time simulation platforms, their hardware configuration prices are relatively expensive, and the cost of later expansion and upgrades is also high

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