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Fabrication method of trench type super junction

A manufacturing method and super junction technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as voids and dislocations in the second nitride layer, and achieve the effects of improving quality and eliminating dislocation defects and void defects

Active Publication Date: 2021-08-24
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existing method is easy to form dislocation defects, and it is also easy to form void defects when the second nitride layer is retained

Method used

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  • Fabrication method of trench type super junction
  • Fabrication method of trench type super junction
  • Fabrication method of trench type super junction

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Experimental program
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Embodiment Construction

[0042] Firstly, the problems of the existing trench-type super junction manufacturing method are introduced. The present invention makes specific improvements to these technical problems:

[0043] There is the first method:

[0044] Such as Figure 1A to Figure 1F Shown is a schematic diagram of the device structure in each step of the existing first trench 201 type super junction manufacturing method; the existing first trench 201 type super junction manufacturing method includes the following steps:

[0045] Step one, such as Figure 1A As shown, a semiconductor substrate 101 is provided, a first conductivity type epitaxial layer 102 is formed on the surface of the semiconductor substrate 101, a hard mask layer 103 is formed on the surface of the first conductivity type epitaxial layer 102, and the hard mask layer 103 is formed on the surface of the first conductivity type epitaxial layer 102. The quality mask layer 103 is composed of a first oxide layer 103 a , a second n...

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Abstract

The invention discloses a method for manufacturing a trench-type super junction, comprising steps: step 1, forming a first oxide layer, a second nitride layer, and a third oxide layer stacked on the surface of the first conductivity type epitaxial layer Hard mask layer; step 2, forming a plurality of grooves, including sub-steps: step 21, opening the groove formation area; step 22, etching the hard mask layer and forming the first part of the hard mask layer an opening; Step 23, etching the epitaxial layer of the first conductivity type to form a trench; Step 3, performing lateral etching back on the second nitride layer to enlarge the opening of the second nitride layer to a third opening; Step 4, Removing the third oxide layer; step five, forming a sacrificial oxide layer and removing it, the second opening at the top of the trench will expand to be equal to the width of the third opening; step six, performing epitaxial growth to form a second conductivity type epitaxial layer and Form a super knot. The invention can eliminate the dislocation defect and void defect of the epitaxial layer filled in the trench.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing method of a trench type super junction. Background technique [0002] The super junction is composed of alternately arranged P-type thin layers and N-type thin layers formed in the semiconductor substrate. The existing super junction manufacturing method includes the manufacturing method of the trench type super junction. This method is through the trench To manufacture super junction devices, it is necessary to etch a trench with a certain depth and width on the N-type doped epitaxial layer on the surface of a semiconductor substrate such as a silicon substrate, and then use epitaxial filling (EPI Filling) to fill the etched trench. The groove is filled with P-type doped silicon epitaxy, and the filled region is required to have a complete crystal structure so that high-performance devices can be fabricated in subsequent proc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06
CPCH01L29/0634
Inventor 伍洲
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP