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Differential relative delay regulator

A delay adjustment and relative delay technology, applied in pulse processing, electrical components, pulse technology, etc., can solve the problems of difficulty in further reduction and limited adjustment granularity, and achieve the effect of reducing granularity and improving accuracy.

Active Publication Date: 2019-01-04
FUDAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a differential relative delay adjuster to solve the problem that the adjustment granularity of the above-mentioned known relative delay adjuster is limited by the transmission delay of the logic gate and it is difficult to further reduce the problem

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Embodiment approach

[0030] Figure 5 It is the simulation result of the relationship between the relative delay and the change of the delay adjustment code in an embodiment of the difference-type relative delay adjuster of the present invention. In this embodiment, the transmission delay adjuster adopts as figure 1 The known transmission delay adjuster shown (the delay adjustment terminal T at this time is S ), the phase controller adopts as Figure 4 The circuit structure shown; at the same time, a pair of phase control bits PC1=0, PC2=1, the first delay adjustment channel (100) and the second delay adjustment channel (200) are respectively configured as the same phase delay mode and Reverse delay working mode. So, will figure 2 The rising edge and falling edge transmission delay adjustment granularity (DR=69.3ps and DF=53.9ps) obtained in the formula 1 is substituted, then: the first output delay signal (CLK1) is relative to the second output delay signal (CLK2 ), the theoretical v...

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Abstract

The invention belongs to the technical field of delays in integrated circuits, in particular to a differential relative delay regulator. The differential relative delay regulator comprises a first delay regulation channel and a second delay regulation channel; the two channels have the same structures, and each channel is formed by an input phase controller, a transmission delay regulator and an output phase controller cascaded in sequence; under control of the same delay regulation codes and a pair of phase control bits with opposite logic values, after the same input to-be-delayed signals are subjected to respective delay processing, a pair of output delay signals are generated by the two channels. Under the delay regulation codes, the size of relative delay regulation granularity between jump edges of the two output delay signals is equal to the absolute value of the difference of the transmission delay regulation granularity between the rise and fall edges of the transmission delayregulator in the channel. The relative delay regulation granularity is reduced, and the relative delay regulation precision is improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit time delay devices, and in particular relates to a differential relative time delay regulator. Background technique [0002] The delay chain is a module used to delay the signal for a certain period of time in the digital circuit. The digital adjustment delay chain has the advantages of simple structure and good process compatibility due to its digital characteristics. Digital adjustment transmission based on logic gate delay The delay chain further meets the needs of the automated design process because it adopts standard cell design on the basis of digitization. [0003] Known NOT-gate-based propagation delay regulators, such as figure 1 As shown, the delay adjustment unit in the dotted line box includes a NOT gate and two tri-state NOT gates; after cascading the delay adjustment units, the NOT gate forms a delay chain; the delay adjustment code S <n:1>It is a one-hot code (or...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/133
CPCH03K5/133H03K2005/00019
Inventor 程旭曾晓洋
Owner FUDAN UNIV