Optimization method of CSP solder joint structural parameters for reducing stress in power cycle-harmonic response coupling

Abstract

An optimization method of CSP solder joint structural parameters for reducing stress in power cycle-harmonic response coupling is disclosed. The method includes: 1) establishing a simulation analysismodel; 2) obtaining the thermal stress value of the solder joint; 3) determining the influencing factors of thermal stress value; 4) determining the parameter level value of the influencing factors; 5) obtaining an experimental sample; 6) obtaining a functional relationship between the influence factors and the thermal stress value; 7) carrying out regression analysis on that functional relation;8) establishing the correctness of the function relation; 9) generating an initial population in a random manner; 10) obtaining the current iterative number and the optimal fitness value; 11) performing crossover operation, mutation operation and evolutionary reversal on that individual; 12) selecting the optimal individual of fitness value; 13) re-judging aft population updating. The method combines a response surface and a genetic algorithm to reduce the stress in the CSP solder joint under power cyclic harmonic response coupling loading, exhibits excellent robustness, is simple in calculation ,and greatly brings convenience for optimization design of the structural parameters of the CSP solder joint in the later period.

Description

Technical field [0001] The invention relates to the technical field of electronic component packaging, in particular to a CSP solder joint structural parameter optimization method for reducing stress under power cycle-harmonic response coupling. Background technique [0002] Chip Scale Package (CSP), as a new type of packaging technology, has been widely used in various electronic products due to its advantages of high precision, fine pitch and small size. When CSP devices are actually used, there are alternating cycles of power on (on), operation, standby, and power off (off). This cycle process is a typical power cycle process, so CSP devices In actual work, it is under a power cycle loading condition. During the power cycle of the CSP device, the temperature rises due to the consumption of electric power, and there is a difference in thermal expansion coefficient between the body of the CSP device and the printed circuit board (PCB). Such thermal expansion occurs when the pow...

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Problems solved by technology

The research results of scholars at home and abroad show that the thermal power cycle and the vibration environment have a non-negligible impact on the reliability of solder joints, but the current research work on the reliability of solder joints is limited to CSP solder joints in a single environment. Reliability research, the research results can not fully reflect the reliability of solder joints in the actual complex working environment, but actually the environment of solder joints in practical applications is relatively complex, and even have to withstand vibration and thermal power cycle l

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