A package substrate and a cascode gallium nitride device formed on the substrate

Abstract

The invention discloses a packaging substrate and a cascode gallium nitride device formed on the substrate, The packaging substrate comprises a substrate body, a copper layer of a printed device circuit on one end face of the substrate body and a copper layer of hot exhaust gas on the other end face, wherein the copper layer of the device circuit comprises a first copper layer and a second copperlayer, and the first copper layer and the second copper layer are electrically isolated; The hot exhaust copper layer is provided with a plurality of gaps extending to the boundary of the substrate. The invention optimizes the structure of the package substrate and the relative position of the copper layer of the device circuit, By changing the wiring relationship between the copper layer of the packaging substrate and the silicon and GaN devices, not only the same-side Gate, Drain and Source pins of cascode GaN devices are arranged sequentially, but also the cascode parasitic inductance, which plays an important role, is optimized to the minimum.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a package substrate and a cascode gallium nitride device formed based on the substrate. Background technique [0002] Wide bandgap semiconductor devices represented by SiC and GaN are known as the third generation semiconductor devices. GaN devices have attracted the attention of scholars at home and abroad. Gallium nitride high electron mobility transistor (GaN HEMT) is the most important device type in the field of gallium nitride devices, basically equivalent to the status of MOSFET in Si devices. GaN HEMTs can be divided into enhancement mode and depletion mode. For the single-enhanced HEMT, on the one hand, the current maximum withstand voltage is 250V, which is lower than people's expected application requirements; on the other hand, it needs a threshold voltage of 1.5V to 4.5V from turn-on to full conduction transition, which puts forward very high requirements f...

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Problems solved by technology

[0004] TO mode is the simplest and most mature packaging process for three-terminal power devices. The traditional TO mode-based Cascode package design will introduce a large common source parasitic inductance (CSI), which will cause switching delays in the Cascode system and generate large losses. , which is not conducive to the application of packaged modules; in addition, the design of high-current and high-voltage HEMTs makes it difficult for the package pins based on PAD arrangement to be compatible with the current IC module assembly rules

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