Logic circuit layout and routing method, graphical display method and system thereof

Abstract

The application relates to a programmable logic array, and discloses a logic circuit layout and wiring method, a graphical display method and a system thereof. Aiming at the graphical display of logic circuits, the present invention uses a directed acyclic graph generation algorithm and preset column distribution rules to allocate logical columns, and at the same time uses a heuristic algorithm to allocate logical rows based on median sorting, thereby optimizing connection intersection points At the same time, in the process of automatic layout, the physical coordinates of the components are allocated according to the physical size of the components, so that the components are concentrated and arranged compactly; the method of caching and windowed drawing is also used to realize the rapid response when dragging and viewing large-scale logic circuits . In the end, the distribution of the generated logic circuit diagram is uniform, the input and output conform to the circuit habits, the number of connection intersections is small, and the diagram is formed quickly.

Description

technical field [0001] The present application relates to a programmable logic array, in particular to a logic circuit layout and wiring method, a graphical display method and a system thereof. Background technique [0002] Programmable Logic Array (PLA) is a kind of programmable logic device. It is a large-scale integrated circuit that is programmable with and / or array and contains memory elements. It can realize any logic function. combinational circuits and sequential circuits. [0003] As the complexity of programmable logic array such as FPGA circuit design increases, designers pay more and more attention to high-level design methods. To improve the interactivity in the design process, the use of schematic diagrams is crucial. Traditionally, designers draw logic circuit diagrams manually according to the feedback results of EDA tools, which will lead to a lot of waste of time and energy, especially in the case of large-scale circuits, which are prone to errors. Altho...

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Problems solved by technology

When drawing a complex logic circuit, through reasonable layout and wiring of the circuit, the logic circuit diagram is evenly distributed, the number of connection intersections is reduced, and the existing drawing tools are improved due to unreasonable layout and wiring. Dayton's problem

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