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Wafer chip separating method

A separation method and wafer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of chip quality decline, wafer impact, chip quality and strength decline, etc., to improve quality and strength, prevent Effects of mechanical or thermal damage

Inactive Publication Date: 2019-02-12
BARUN ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, in the method of dicing with a blade, the blade acts by external force, and therefore, there is a possibility of impacting the wafer, resulting in a decrease in chip quality.
[0005] In addition, in the method of dicing with a laser, the properties of the wafer change with the application of heat, so there is also a problem that the quality and strength of the chip decrease.

Method used

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  • Wafer chip separating method
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Embodiment Construction

[0022] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The structure of this invention and the effect based on it can be clearly understood from the following detailed description.

[0023] figure 1 It is a process flow chart showing the wafer chip separation process of the present invention.

[0024] The wafer chip separation process of the present invention includes a wafer through-hole forming process S10 , a tape attaching process S20 , a wafer grinding process S30 and a tape stretching process S40 , so that the wafer chips are finally divided.

[0025] refer to Figure 2 to Figure 6 ,illustrate figure 1 The various steps of the wafer chip separation process are shown.

[0026] First, via holes 11 are formed on scribe lines of the wafer 10 .

[0027] The through hole 11 can also be formed on the dicing line of the wafer 10 by means of etching. figure 2 A state in which via holes 11 are formed along dicing...

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Abstract

The invention relates to a wafer chip separation method, detailedly, relates to a wafer chip separation method for separating a chip from a wafer without causing thermal or mechanical damage. The wafer chip separation method includes: a step of forming a via hole along a cutting line of the wafer; a step of attaching an adhesive tape to the wafer which is provided with the via hole; a step of disposing the wafer to which the adhesive tape is attached on an annular frame; a step of fixing the annular frame to a cooling table; a step of stretching the adhesive tape by using a stretching roll ring; and with stretching of the adhesive tape, separating the wafer along the cutting line using a chip as a unit.

Description

technical field [0001] The present invention relates to a wafer chip separation method, and in particular, to a wafer chip separation method capable of separating chips from a wafer without thermal or mechanical damage. Background technique [0002] Methods for separating individual chips within a wafer include mechanical dicing and thermal dicing. [0003] The mechanical method is a method of cutting with a blade, and the thermal cutting method is a method of cutting with a laser. [0004] However, in the method of dicing with a blade, the blade acts by an external force, and therefore, an impact may be generated on the wafer, resulting in a decrease in chip quality. [0005] In addition, in the method of dicing with a laser, since the properties of the wafer change with the application of heat, there is also a problem that the quality and strength of the chip are lowered. [0006] prior art literature [0007] patent documents [0008] Korean Patent No. 0695490 Conte...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/78
CPCH01L21/78H01L21/67092H01L21/67132H01L21/76
Inventor 朴相翼
Owner BARUN ELECTRONICS CO LTD