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Wafer cutting process

A cutting process and wafer technology, applied in manufacturing tools, metal processing equipment, laser welding equipment, etc., can solve problems such as difficult identification of reference points, doping of unqualified chip products, etc.

Active Publication Date: 2019-03-29
CHIPMOS TECHSHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The reference marks in the prior art are generally manually added reference points on the edge of the wafer with a marker pen, but the manually marked reference points are easily recognized by the placement station machine, which makes it difficult to identify the edge chips when the wafer is subsequently cut. Manually marked reference points so that bad chip product is adulterated into good product

Method used

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Embodiment Construction

[0036] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0037] In describing the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", " The orientations or positional relationships indicated by "vertical", "horizontal", "top", "bottom", "inner", "outer", "axial", "radial", and "circumferential" are based on...

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Abstract

The invention discloses a wafer cutting process, and the process comprises the steps: providing a wafer with a longitudinal cut way and a lateral cut way on the front, attaching a grinding film on thefront surface of the wafer to perform the back surface of the wafer till the wafer is thinned to preset thickness, attaching a back film to the back surface of the thinned wafer, and attaching the wafer to a wafer holder through the back film, wherein the wafer holder is used to limit the movement of the wafer; removing the grinding film of the wafer on the wafer holder, and performing laser burning on the front surface of the wafer from which the grinding film has been removed to form a plurality of reference grooves on the front surface of the wafer, wherein the reference grooves surroundsa polygonal region; cutting the wafer according to the longitudinal and lateral cut ways, and taking down a chip according to the polygonal region. The wafer cutting process disclosed by the inventioncan accurately mark the position of a front reference point, improves the cutting accuracy of the wafer, and avoids the doping of the unqualified chip product into a qualified product.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a wafer cutting process. Background technique [0002] Semiconductor packaging refers to the process of processing the tested wafers according to the product model and functional requirements to obtain independent chips. In the process of semiconductor packaging, when the wafer factory produces the wafer, it generally does not make a feature point on the front of the wafer. For the placement station, it is necessary to manually mark a reference point and manually confirm the wafer twice. starting working position. [0003] The reference marks in the prior art are generally manually added reference points on the edge of the wafer with a marker pen, but the manually marked reference points are easily recognized by the placement station machine, which makes it difficult to identify the edge chips when the wafer is subsequently cut. Manually marked reference points ...

Claims

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Application Information

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IPC IPC(8): H01L21/304H01L21/78H01L21/67H01L21/683B23K26/38
CPCB23K26/38H01L21/3043H01L21/67126H01L21/6836H01L21/78
Inventor 沈珏玮李荣
Owner CHIPMOS TECHSHANGHAI
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