Low-tunneling electric leakage semi-floating-gate transistor and preparation method thereof

Abstract

The invention belongs to the technical field of integrated circuit device manufacturing, and particularly relates to a low-tunneling electric leakage semi-floating-gate transistor and a preparation method thereof. According to the low-tunneling electric leakage semi-floating-gate transistor and the preparation method thereof, a control gate and a gate medium of the control gate adopt a high-K / metal gate structure, the leakage current of a gate electrode of a semi-floating-gate device can be reduced, the switching speed of the transistor is accelerated, and the power consumption is reduced. Thelow-tunneling electric leakage semi-floating-gate transistor is advantageously used for being applied to manufacturing of an integrated circuit semi-floating-gate device in the future, the drain electrode voltage of the semi-floating-gate device can be effectively reduced, and the speed of the semi-floating-gate device is accelerated and the power consumption is reduced. In addition, the processsteps of the preparation method of the semi-floating-gate transistor are further simplified, and the production cost can be further reduced.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit device manufacturing, and in particular relates to a low tunnel leakage semi-floating gate transistor and a preparation method thereof. Background technique [0002] At present, the DRAM devices used in integrated circuit chips are mainly 1T1C structures, that is, a transistor is connected in series with a capacitor, and the capacitor is charged and discharged through the switching of the transistor, thereby realizing the conversion between 0 and 1 of the DRAM device. [0003] As the device size becomes smaller and smaller, DRAM devices used in integrated circuit chips are facing more and more problems. For example, DRAM devices require 64 ms to refresh once, so the capacitance value of the capacitor must be kept above a certain value to ensure sufficient Long charge retention time, but with the shrinking of the feature size of integrated circuits, the manufacture of large capacitors ha...

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Problems solved by technology

[0003] As the device size becomes smaller and smaller, DRAM devices used in integrated circuit chips are facing more and more problems. For example, DRAM devices require 64 ms to refresh once, so the capacitance value of the capacitor must be kept above a certain value to ensure sufficient Long charge retention time, but with the shrinking of the feature size of integrated circuits, the manufacture of large capacitors has become more and more difficult, and has accounted for more than 30% of the manufacturing cost

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