Memory device and manufacturing method thereof

A manufacturing method and storage device technology, applied in the direction of electric solid-state devices, semiconductor devices, electrical components, etc., to achieve the effects of improving process stability, increasing integration, and avoiding over-etching

Active Publication Date: 2019-05-14
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Increasing the number of stacked layers can effectively improve the integration of 3D NAND memory devices, but it also poses more challenges to the manufacturing process

Method used

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  • Memory device and manufacturing method thereof
  • Memory device and manufacturing method thereof
  • Memory device and manufacturing method thereof

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Embodiment Construction

[0038] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0039] In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described here, and those skilled in the art can do it without departing from the meaning of the present invention. By analogy, the present invention is therefore not limited to the specific examples disclosed below.

[0040] Secondly, the present invention is described in detail in combination with schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the gener...

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Abstract

The invention provides a memory device and a manufacturing method thereof. Forming a sacrificial layer in a first sub-channel hole in a first stacked layer; then forming an etch stopping layer; and then continuing to form a second stacked layer over the etch stopping layer; forming a second sub-channel hole above the first sub-channel hole using the etch stopping layer as an etching focus when thesecond sub-channel hole is formed in the second stacked layer; so that a through channel hole is formed after the etch stopping layer above a second sacrificial layer and the second sacrificial layerare removed. Therefore, the integration of the memory device is effectively improved; meanwhile, the over etching to the second sacrificial layer is avoided during etching of the second sub-channel hole by setting the etch stopping layer; therefore, the process stability is improved, and the device yield is increased.

Description

technical field [0001] The invention relates to the field of semiconductor devices and manufacturing thereof, in particular to a storage device and a manufacturing method thereof. Background technique [0002] NAND storage devices are non-volatile storage products with low power consumption, light weight and good performance, and are widely used in electronic products. [0003] Planar NAND devices are close to the limit of practical expansion. In order to further increase storage capacity and reduce storage cost per bit, 3D NAND storage devices are proposed. In the 3D NAND memory device structure, a stacked 3D NAND memory device is implemented by vertically stacking multiple layers of memory cells to form a string of memory cells in the stacked layers. Increasing the number of stacked layers can effectively improve the integration of 3D NAND storage devices, but it also poses more challenges to the manufacturing process. Contents of the invention [0004] In view of this...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11556H01L27/11582
Inventor 卢峰刘沙沙
Owner YANGTZE MEMORY TECH CO LTD
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