Efficient charge pump circuit structure

Abstract

The invention discloses an efficient charge pump circuit structure, which includes two or more charge-discharge units connected in parallel, the two or more charge-discharge units output a negative intermediate voltage VCL, the intermediate voltage VCL is connected to one end of a voltage stabilization capacitor C2, and the other end of the voltage stabilization capacitor C2 is grounded; each charge-discharge unit includes a charge-discharge capacitor C1, PMOS tubes P1 and NMOS tubes N1 are arranged on the left sides of the charge-discharge capacitors C1, source electrodes S of the PMOS tubesP1 and the NMOS tubes N1 are connected with the charge-discharge capacitors C1, drain electrodes D of the PMOS tubes P1 are connected to a main voltage VCI, and drain electrodes D of the NMOS tubes N1are connected to a grounding voltage VSSA; and NMOS tubes N2 and NMOS tubes N3 are arranged on the left sides of the charge-discharge capacitors C1, drain electrodes D of the NMOS tubes N2 and the NMOS tubes N3 are connected with the charge-discharge capacitors C1, source electrodes S of the NMOS tubes N2 are connected to the grounding voltage VSSA, and drain electrodes S of the NMOS tubes N3 areconnected to the intermediate voltage VCL. The ripples of the voltages can be at least halved, control voltages of grid electrodes G are changed to be between the main voltage VCI and the intermediate voltage VCL, the NMOS tubes are guaranteed to have low on resistance, high voltage reduction speed and high efficiency.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a high-efficiency charge pump circuit structure. Background technique [0002] The charge pump circuit is widely used in the drive circuits of LCD and touch screens due to its characteristics of step-up and step-down. In order to save the chip cost, the chip will only be connected with a main power supply of about 3v; To drive the gate G of TFT (Thin Film Transistor) and perform data transmission, a gate G drive circuit (gate circuit) and a source S drive circuit (source and gamma circuit) are required. In order to ensure a better display screen, the data The range will be relatively wide, and a 3v power supply is not enough; therefore, a charge pump circuit is required to provide a power supply voltage of about ±12V to the gate G drive circuit, and at the same time provide a power supply voltage of about ±6V to the source S drive circuit. And for Continue to reduce ...

AI Technical Summary

Problems solved by technology

[0004] First, the leakage leads to a decrease in the efficiency of the charge pump, and at the same time causes great disturbance to other power supplies

like figure 2 As shown, the B terminal of the MOS transistor P2 is connected to VSSA, and the A terminal is connected to the right port of the charging and discharging capacitor C1. When the MOS transistor P2 is charging, a parasitic PNP transistor inside will be turned on, which will reduce the charging efficiency. At the same time, for the substrate It has adverse effects, especially for the negative high-voltage power supply substrate generated by the charge pump with built-in capacitors. Due to its weak load capacity, other circuits will cause relatively large voltage fluctuations when inputting current to it.

[0005] Second, due to the different driving capabilities of the PMOS transistor and the NMOS transistor in the level conversion circuit, with the deviation of the process, the normal non-overlapping signal cannot be guaranteed, resulting in low efficiency of the charge pump

Since the gate G control voltages of MOS transistor P1 and MOS transistor N1 have the same voltage range, non-overlapping is well realized, and the same is true for the gate G control voltages of MOS transistor P2 and MOS transistor N2; but for MOS transistor P1 and MOS transistor N2 It is difficult to achieve non-overlapping with the gate G control signals of MOS transistor P2 and MOS transistor N1

like image 3 As shown, the PMOS tube is stronger than the NMOS tube, and as Figure 4 As shown, the NMOS tube is stronger than the PMOS tube. With the deviation of the process, it will cause such as Image 6 waveform shown, resulting in an extremely inefficient charge pump

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