An esd protection device for soi power switch

Abstract

The present invention relates to the technical field of semiconductor devices, in particular to an ESD protection device for an SOI power switch, comprising: a P-type substrate; an N-type deep well on the P-type substrate; first sequentially arranged on the N-type deep well N well, first P well, second N well, second P well, third N well, the width range of the second N well is 2‑8μm; the first P well includes the first P+ injection region, the first N+ Implantation region, there is a second P+ implantation region across between the first P well and the second N well; the second P well includes a second N+ implantation region, a fourth P+ implantation region, between the second N well and the second There is a third P+ injection region across the P wells; there is a gate oxide layer on the second N well, the length of the gate oxide layer is 0.25-6 μm, the first P+ injection region and the first N+ injection region are connected to the anode, and the second N well is connected to the anode. The second N+ injection region and the fourth P+ injection region are connected to the cathode, which increases the sustain voltage of the device, reduces the trigger voltage of the device, and improves the protection performance.

Description

technical field

[0001] The invention relates to the technical field of semiconductor devices, in particular to an ESD protection device for SOI power switches. Background technique

[0002] Electrostatic discharge (ESD, Electron Static Discharge) is an instantaneous process in which a large amount of static charge is poured into the integrated circuit from the outside to the inside when the pins of an integrated circuit are floating, and the whole process takes about 1000ns. When the electrostatic discharge of the integrated circuit will generate hundreds or even thousands of volts of high voltage, the gate oxide layer of the input stage in the integrated circuit will be broken down. With the advancement of integrated circuit technology, the feature size of MOS transistors is getting smaller and smaller, and the thickness of the gate oxide layer is getting thinner. In this trend, high-performance ESD protection devices are used to discharge electrostatic charges to protect t...

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