Storage device configured to update field programmable gate array and method of operating the same

Abstract

A storage device includes a controller and a nonvolatile memory device. The controller includes a field programmable gate array (FPGA) and receives an FPGA image for updating the FPGA from an outsidein response to a first command received from the outside. The nonvolatile memory device stores the FPGA image. The controller receives the FPGA image through a main interface or a sideband interface,and executes the FPGA image in response to a second command received from the outside.

Description

[0001] Cross References to Related Applications [0002] This application claims Korean Patent Application No. 10-2017-0154277 filed with the Korean Intellectual Property Office on November 17, 2017 and Korean Patent Application No. 10-2018 filed with the Korean Intellectual Property Office on July 9, 2018 - Priority of 0079421, the entire disclosure of said application is hereby incorporated by reference. technical field [0003] Example embodiments relate to semiconductor devices. For example, at least some example embodiments relate to memory devices configured to receive FPGA images through a host interface or a sideband interface. Background technique [0004] Semiconductor memories can be classified into volatile memory devices and nonvolatile memory devices, and volatile memory devices such as static random access memory (SRAM), dynamic RAM (DRAM) and synchronous DRAM (SDRAM) When the data stored in it is lost when the power is turned on, non-volatile memory devices...

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Problems solved by technology

However, the external memory can be read with a separate dedicated circuit for receiving the FPGA image, resulting in increased cost, increased chip size, etc.

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