Time correction method, device and system and computer storage medium

Abstract

Embodiments of the invention disclose a time correction method, device and system and a computer storage medium. The method comprises the steps of rejecting first counts according with a first presetcondition in an obtained first count set, and rejecting second counts corresponding to the rejected first counts in a second count set, wherein the first counts and the second counts are one and another in coarse counts and fine counts generated by TDC; when the rejected second counts do not accord with a second preset condition, rejecting second counts according with the second preset condition in the second count set; calculating a first time unit according to the residual first counts in the first count set; calculating a second time unit according to the residual second counts in the second count set; and utilizing the obtained first time unit and second time unit to correcting the time difference of two trigger signals. Through utilizing the method, the correctness of time measurementresults of TDC can be improved.

Description

technical field [0001] The present application relates to the technical field of data processing, and in particular to a time correction method, device, system and computer storage medium. Background technique [0002] The descriptions in this section merely provide background information related to the disclosure in this application and may not constitute prior art. [0003] The time-to-digital converter (TDC) can convert the time signal to be measured into a numerical code according to the designed time unit, and then restore the time information of the time signal to be measured by multiplying the obtained numerical code by the designed time unit. The restoration accuracy is high, so it is widely used in high-precision time measurement systems. [0004] TDC generally adopts a delay-locked loop (DLL) circuit, which mainly includes two delay-locked fast DLLs and slow DLLs composed of a delay unit, a phase frequency detector (PFD), a charge pump (CP), and a ring oscillator....

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Problems solved by technology

[0005] In the prior art, due to the influence of manufacturing process, ambient temperature, power supply voltage and other factors, the actual value of the time unit of TDC often deviates from its design value

For example, the circuit structure used to compare two input signals in the PFD cannot be completely symmetrical, which leads to an overall shift in the phase comparison result; the delay of the gate circuit will fluctuate with the manufacturing process, when the delay of the feedback signal in the PFD is short , the phase comparison result has a dead zone, that is, when the phase difference of the two input signals is smaller than the dead zone, the PFD cannot output the comparison result. When the delay of the feedback signal in the PFD is long, the phase comparison result will be in the phase lead and Repeated jumps during hysteresis lead to unstable reference voltage and affect the time unit accuracy of TDC; the structure of each delay unit in DLL and ring oscillator cannot be completely consistent, which leads to the delay signal output by each delay unit. The delay times are not equal, causing the true value of the time unit to deviate from its designed value

In TDC, the deviation of the real value of the time unit from its design value will lead to inaccurate time measurement results, which will affect the time measurement accuracy of TDC

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