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Vertical structure chip and manufacturing method

A vertical structure and manufacturing method technology, applied in the field of optoelectronics, can solve problems affecting external quantum efficiency and achieve the effect of ensuring stability

Active Publication Date: 2020-07-28
XIAMEN CHANGELIGHT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to provide a kind of vertical structure chip and manufacturing method, to alleviate the technical problem that the N-type metal electrode in the vertical structure chip in the prior art easily affects external quantum efficiency

Method used

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  • Vertical structure chip and manufacturing method
  • Vertical structure chip and manufacturing method

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Experimental program
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Effect test

Embodiment 1

[0045] refer to figure 1, the vertical structure chip provided by this embodiment includes a conductive substrate 1, a P-side metal layer 2, an epitaxial layer, a transparent conductive layer 6, and a metal electrode 7, wherein the epitaxial layer is fixed on one side of the conductive substrate 1 through the P-side metal layer 2 The epitaxial layer sequentially includes a P-type semiconductor 3, an active layer 4, and an N-type semiconductor 5 along a direction away from the conductive substrate 1, and the transparent conductive layer 6 and the metal electrode 7 are all fixed on the side of the N-type semiconductor 5 away from the conductive substrate 1, and The metal electrode 7 is electrically connected to the transparent conductive layer 6 and the N-type semiconductor 5 at the same time.

[0046] In this vertical structure chip, by setting the transparent conductive layer 6, the metal electrode 7 is only used to realize the electrical connection between the transparent con...

Embodiment 2

[0057] refer to figure 1 - Figure 8 , the present embodiment provides a method for fabricating a vertical structure chip, which is used to fabricate the vertical structure chip as described above, comprising the following steps:

[0058] S1: sequentially forming an unintentionally doped semiconductor 10, an N-type semiconductor 5, an active layer 4, and a P-type semiconductor 3 on the substrate 9;

[0059] S2: making a P-face metal layer 2 on the side of the P-type semiconductor 3 facing away from the substrate 9, and fixing a conductive substrate 1 on the side of the P-face metal layer 2 facing away from the substrate 9;

[0060] S3: removing the substrate 9 and the unintentionally doped semiconductor 10, exposing the N-type semiconductor 5;

[0061] S4: separating the N-type semiconductor 5, the active layer 4 and the P-type semiconductor 3 to form a plurality of chip units;

[0062] S5: making a transparent conductive layer 6 on the side of the N-type semiconductor 5 in...

Embodiment 3

[0070] refer to figure 1 - Figure 7 , the present embodiment provides another method for fabricating a vertical structure chip, which is used to fabricate the vertical structure chip as described above, including the following steps:

[0071] S1: sequentially forming an unintentionally doped semiconductor 10, an N-type semiconductor 5, an active layer 4, and a P-type semiconductor 3 on the substrate 9;

[0072] S2: making a P-face metal layer 2 on the side of the P-type semiconductor 3 facing away from the substrate 9, and fixing a conductive substrate 1 on the side of the P-face metal layer 2 facing away from the substrate 9;

[0073] S3: removing the substrate 9 and the unintentionally doped semiconductor 10, exposing the N-type semiconductor 5;

[0074] S4: separating the N-type semiconductor 5, the active layer 4 and the P-type semiconductor 3 to form a plurality of chip units;

[0075] S5: making metal electrodes 7 and metal pads 8 on the side of the N-type semiconduc...

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Abstract

The invention provides a vertical structure chip and a manufacturing method thereof, and relates to the field of optoelectronic technology. The vertical structure chip comprises a conductive substrate, a P-side metal layer, an epitaxial layer, a transparent conductive layer and a metal electrode, wherein the epitaxial layer is fixed to one side of the conductive substrate through the P-side metallayer, and successively includes a P-type semiconductor, an active layer, and an N-type semiconductor in a direction away from the conductive substrate; the transparent conductive layer and the metalelectrode are both fixed to a side of the N-type semiconductor away from the conductive substrate; and the metal electrode is simultaneously and electrically connected to the transparent conductive layer and the N-type semiconductor. The technical problem is solved that the N-type metal electrode in the vertical structure chip in the prior art is likely to affect the external quantum efficiency.

Description

technical field [0001] The invention relates to the field of optoelectronic technology, in particular to a vertical structure chip and a manufacturing method. Background technique [0002] With the rapid development of light-emitting diodes, the application of LEDs is changing with each passing day. The use of vertical structures has become an important branch of development in light-emitting diode technology. At present, the N electrodes of vertical structure chips are made by making metal electrodes (metal pads + metal electrodes) on the surface of N-type semiconductors or using through-hole design (OSRAM UX3). [0003] However, making metal electrodes on the surface of N-type semiconductors is easy to block light and affect the external quantum efficiency; the through-hole design needs to open multiple holes inside the epitaxial layer to achieve the purpose of forming ohmic contacts with N-type semiconductors. The process is complex and the reliability is low. . Conte...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L33/40H01L33/42H01L33/38
CPCH01L33/38H01L33/40H01L33/42H01L2933/0016
Inventor 曲晓东陈凯轩赵斌林志伟
Owner XIAMEN CHANGELIGHT CO LTD