Parallel time-alternating high-speed sampling system based on multiple ADCs
A time-alternating, high-speed sampling technology, applied in the field of communication, can solve the problem of high sampling rate resolution and dynamic performance of a single-chip ADC, and achieve the effect of flexible and changeable configuration of storage and computing resources and rich I/O resources
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[0033] The present invention designs a set of high-speed acquisition systems based on four low-speed ADCs that adopt parallel time-alternative sampling and finally realize a sampling rate of 1GSPS.
[0034] Step 1: When we design a high-speed data acquisition system, how to provide high-quality input analog signals to the ADC is one of the key points of our design. First of all, in order to improve the anti-interference ability of the input signal, suppress electromagnetic interference, suppress common-mode noise, reduce even-order harmonics, and make the ADC have better dynamic performance, the high-precision ADC chip in this system requires the analog signal to be input in a differential manner ;Secondly, in order to meet the sampling voltage range of ADC 2Vp-p in this system, we need to adjust the gain of the differential amplifier reasonably; again, in order to reduce the distortion of the analog signal, we need to perform impedance matching on the input circuit of the analog...
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