NOR flash memory device and preparation method thereof

Abstract

The invention discloses an NOR flash memory device and a preparation method thereof. The NOR flash memory device comprises a substrate, a tunneling oxide layer, a floating gate layer, a dielectric layer and a control gate layer, which are stacked up in sequence; at least one floating gate via hole running through the control gate layer and the dielectric layer, wherein the floating gate via hole is arranged in an active region and is used for exposing the floating gate layer to lead out a floating gate electrode; and at least one active region blocking structure, which is arranged between thesubstrate and the dielectric layer and is used for reducing wear of the floating gate layer exposed by the floating gate via hole in the chemical mechanical polishing process of the floating gate layer. According to the technical scheme, by adding the active region blocking structure, polishing rate of the chemical mechanical polishing process for the floating gate layer around can be effectivelyreduced, the thickness of the floating gate layer around is increased, the phenomenon leakage or breakdown of the NOR flash memory device due to too thin floating gate layer can be prevented, and reliability of the NOR flash memory device is improved.

Description

technical field [0001] Embodiments of the present invention relate to semiconductor device technology, and in particular to a NOR flash memory device and a manufacturing method thereof. Background technique [0002] For the floating gate (Floating Gate, FG) NOR flash memory device manufactured by the traditional process of 90 / 65nm node and below, in order to increase the capacitance per unit area of ​​the high withstand voltage capacitor, improve the utilization rate of the chip area, and reduce the cost, a stacking method will be introduced. The oxide layer-nitride layer-oxide layer (Oxide-Nitride-Oxide, ONO) capacitor of the first layer is used in a high-voltage charge pump. [0003] figure 1 It is a top view structure diagram of an ONO capacitor in the prior art. figure 2 yes figure 1 Schematic diagram of the cross-sectional structure along A1-A2. see figure 1 and figure 2 The ONO capacitor is composed of a silicon substrate 10 - a tunnel oxide (Tunnel Oxide, TO) ...

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Problems solved by technology

[0005] The invention provides a NOR flash memory device and a preparation method thereof, in order to achieve the purpose of improving the reliability of the NOR flash memory device, and solve the problem of leakage or breakdown of the NOR flash memory device caused by the thin floating gate layer

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