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36results about How to "Reduce polishing rate" patented technology

Preparation method for silica-based gallium arsenide material with high quality and low surface roughness

The invention discloses a preparation method for silica-based gallium arsenide material with high quality and low surface roughness. The preparation method comprises the following steps: step 1, a germanium layer is grown on a silicon substrate; step 2, the silicon substrate on which the germanium layer is grown is placed in an MOCVD (metal-organic chemical vapor deposition) reaction chamber to be subjected to annealing for the first time; step 3, a low-temperature gallium arsenide nucleating layer and a high-temperature gallium arsenide layer are grown on the germanium layer in sequence to form a sample; step 4, the sample is polished and rinsed; step 5, the sample is put in the MOCVD reaction chamber to be subjected to annealing for the second time; and step 6, a gallium arsenide cover layer is grown on the surface of the sample, and the preparation of the silica-based gallium arsenide material is finished. The preparation method for the silica-based gallium arsenide material with high quality and low surface roughness can solve the transition problem of the silicon substrate to III-V material and establishes the basis of substrate for silica-based gallium arsenide photoelectric and microelectronic devices.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Preparation method of silicon-based gallium arsenide material with low surface roughness

The invention discloses a preparation method for silica-based gallium arsenide material with high quality and low surface roughness. The preparation method comprises the following steps: step 1, a germanium layer is grown on a silicon substrate; step 2, the silicon substrate on which the germanium layer is grown is placed in an MOCVD (metal-organic chemical vapor deposition) reaction chamber to be subjected to annealing for the first time; step 3, a low-temperature gallium arsenide nucleating layer and a high-temperature gallium arsenide layer are grown on the germanium layer in sequence to form a sample; step 4, the sample is polished and rinsed; step 5, the sample is put in the MOCVD reaction chamber to be subjected to annealing for the second time; and step 6, a gallium arsenide cover layer is grown on the surface of the sample, and the preparation of the silica-based gallium arsenide material is finished. The preparation method for the silica-based gallium arsenide material with high quality and low surface roughness can solve the transition problem of the silicon substrate to III-V material and establishes the basis of substrate for silica-based gallium arsenide photoelectric and microelectronic devices.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

A kind of NOR flash memory device and preparation method thereof

The invention discloses a NOR flash memory device and a preparation method thereof, wherein the NOR flash memory device comprises a sequentially stacked substrate, a tunnel oxide layer, a floating gate layer, a dielectric layer and a control gate layer; at least one through the control gate layer and the floating gate via hole of the dielectric layer, the floating gate via hole is located in the active area, and is used to expose the floating gate layer to lead out the floating gate electrode; at least one active area blocking structure, the active area blocking structure is arranged on the substrate Between the dielectric layer and the chemical mechanical polishing process on the floating gate layer, it is used to reduce the wear of the floating gate layer exposed by the floating gate via hole. The technical scheme of the present invention can effectively reduce the polishing rate of the floating gate layer around it by the chemical mechanical polishing process by adding a barrier structure in the active region, increase the thickness of the floating gate layer around it, and avoid damage caused by the floating gate layer being too thin. This leads to leakage or breakdown of the NOR flash memory device, which improves the reliability of the NOR flash memory device.
Owner:GIGADEVICE SEMICON SHANGHAI INC +1

Nanometer polysiloxane nontoxic low-surface-energy ship antifouling coating and preparation method thereof

The invention relates to the field ship antifouling coatings, in particular to a nanometer polysiloxane nontoxic low-surface-energy ship antifouling coating for sea ships and a preparation method thereof, which are used for solving the problem of long-term nontoxicity, antifouling and corrosion on the outer bottom surface of a ship. The nanometer polysiloxane nontoxic low-surface-energy ship antifouling coating comprises the following components in parts by weight: 50-55 parts of polysiloxane resin, 1-5 parts of nanometer slurry, 5-8 parts of dimethylbenzene, 6-10 parts of butyl ester; 2.0-3.0 parts of ethylene glycol diethyl ether acetic ester, 0.3-0.5 part of a dispersing agent, 0.3-0.5 part of an antifoaming agent, 0.1-0.3 part of a flatting agent, 0.5-0.8 part of an anti-settling agent, 0.4-0.7 part of gas phase white carbon black, 15-22 parts of a pigment and 3-6 parts of a filler. The preparation method comprises the following steps of: proportionally preparing, dispersing, and grinding till the fineness is below 30 micros to obtain a component A; and mixing the component A and the component B for curing to obtain the nontoxic long-term ship sea antifouling coating. The nanometer polysiloxane nontoxic low-surface-energy ship antifouling coating is a surface protection material with extreme low surface energy, and plays roles in preventing fouling and scaling, and marine organisms are prevented from being adhered to the antifouling coating easily.
Owner:INST OF METAL RESEARCH - CHINESE ACAD OF SCI +1
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