Electromigration test structure and method

A technology of test structure and test method, which is applied in the direction of semiconductor/solid-state device test/measurement, circuit, electrical components, etc. It can solve the problems of uniform heating of test metal wires, difficulty in providing target test temperature, etc., and achieve the effect of efficient conduction
CN110379725AActive Publication Date: 2019-10-25SHANGHAI HUALI MICROELECTRONICS CORP
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI HUALI MICROELECTRONICS CORP
Publication Date
2019-10-25

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Abstract

The invention provides an electromigration test structure and method. Heat is generated by utilizing a polysilicon heater to provide a temperature for performing an electromigration test on a test metal wire, and the heat generated by the polysilicon heater is conducted to the periphery of the test metal wire by utilizing a heat conduction structure so as to uniformly heat the test metal wire. Compared with the prior art, the heat conduction structure can efficiently conduct the heat generated by the polysilicon heater and can conduct the heat to the periphery of the test metal wire, so that the heating temperatures of different parts of the test metal wire can be consistent with the target heating temperature.
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Description

technical field

[0001] The invention relates to the technical field of semiconductors, in particular to an electromigration test structure and method. Background technique

[0002] With the advancement of technology nodes, the reliability assessment of electromigration becomes more and more important. Common electromigration tests use packaging-level samples for testing. Specifically, firstly, the wafer is diced, chips are cut and packaged, and a furnace is used to provide high temperature for electromigration testing. The advantage of package-level testing is that a large number of samples can be tested at one time, and the electromigration life can be obtained by statistical analysis. However, the disadvantage of this method is that the utilization rate of the chip is low, and the cutting and packaging process may have an impact on the test structure, as well as the entire The process takes a long time. Another constant thermal electromigration test method can be tested...

Claims

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