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Method for improving stability of Sigma trench etching process and method for forming germanium-silicon epitaxial layer

A stability and process technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems affecting silicon germanium, reduce sigma trench stability, surface roughness, etc., to achieve the effect of improving stability

Active Publication Date: 2019-10-25
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, during the dry etching process of silicon, a large number of polymer by-products will be produced on the surface of the silicon trench, and there will be a rough surface oxide layer in the subsequent surface cleaning process. These microscopic and atomic level factors, It makes the wet etching of sigma trenches difficult to obtain stable critical dimension results, and eventually affects the occurrence of various defects in germanium and silicon epitaxy, reducing the stability of sigma trench etching process

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  • Method for improving stability of Sigma trench etching process and method for forming germanium-silicon epitaxial layer
  • Method for improving stability of Sigma trench etching process and method for forming germanium-silicon epitaxial layer
  • Method for improving stability of Sigma trench etching process and method for forming germanium-silicon epitaxial layer

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Embodiment Construction

[0034] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

[0035] In the first embodiment of the present invention, a method for improving the stability of the sigma trench etching process is provided. For details, please refer to Figure 4 , Figure 4 It is a flowchart of a method for improving the stability of a sigma trench etching process according to the first embodiment of the present invention, and please refer to Figure 5 , Figure 5 It is a schematic diagram of the process of improving the stability of the sigma trench etching process according to the first embodi...

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Abstract

The invention relates to a method for improving the stability of a Sigma trench etching process and a method for forming a germanium-silicon epitaxial layer, and relates to a semiconductor chip manufacturing technology. The concept of waiting time is introduced into the three procedures of dry etching, wet cleaning and wet etching. There are halogen elements in residues after the dry etching, andthe byproducts will influence the density and thickness of an oxide layer in the subsequent cleaning process, so that the wet etching process cannot be normally carried out. Enough waiting time is given among the three procedures, water vapor in the environment can help the gasification of the halogen elements and repair the surface, and natural oxygen in the environment can help the formation ofa saturated and compact oxide layer, so that the stability of the wet etching is improved. Therefore, the stability of the Sigma trench etching process is improved on the basis of not improving the process cost and the complexity according to the invention.

Description

Technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to a method for improving the stability of a sigma trench etching process and a method for forming a silicon germanium epitaxial layer. Background technique [0002] In the field of semiconductor manufacturing technology, with the development of semiconductor technology, the feature size of various semiconductor devices is continuously reduced, and the requirements for the performance of semiconductor devices are getting higher and higher. For example, for PMOS devices, a larger drive current is required to improve the response speed of the circuit. [0003] In the prior art, in order to increase the driving current of NMOS devices and PMOS devices at the same time, generally <110> Crystal-oriented wafers, and different stresses are applied to the channel to improve the performance of NMOS devices and PMOS devices. See figure 1 , figure 1 Schematic diagram of the relationshi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L21/67
CPCH01L21/67253H01L21/823814
Inventor 夏军
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD