Array substrate and preparation method thereof

A technology of array substrate and base substrate, applied in the field of array substrate and its preparation, can solve the problems of electrostatic breakdown, decrease in yield of array substrate, accumulation of static electricity, etc., so as to improve yield, avoid electrostatic breakdown phenomenon, and reduce static electricity. cumulative effect

Active Publication Date: 2019-11-29
FUZHOU BOE OPTOELECTRONICS TECH CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the oxide semiconductor material layer is easy to generate and accumulate static electricity in the exposure machine, which may lead to electrostatic breakdown (ESD), resulting in a decrease in the yield of the array substrate

Method used

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  • Array substrate and preparation method thereof
  • Array substrate and preparation method thereof
  • Array substrate and preparation method thereof

Examples

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Embodiment Construction

[0049] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present disclosure.

[0050] In the drawings, the thicknesses of regions and layers may be exaggerated for clarity. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.

[0051] The terms "a", "an" and "the" are used to indicate th...

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Abstract

The invention provides an array substrate and a preparation method thereof, and belongs to the technical field of display. The preparation method of the array substrate comprises the steps of providing an underlayer substrate; forming a common electrode lap joint line on one side of the underlayer substrate; forming an oxide semiconductor material layer, wherein the oxide semiconductor material layer and the common electrode lap joint line are located on the same side of the underlayer substrate, and the oxide semiconductor material layer is electrically connected with at least part of the common electrode lap joint line; and carrying out patterning treatment on the oxide semiconductor material layer to form an oxide semiconductor layer with a plurality of active layers, wherein the orthographic projection of the oxide semiconductor layer on the underlayer substrate is at most partially overlapped with the orthographic projection of the common electrode lap joint line on the underlayersubstrate, and any active layer is insulated from the common electrode lap joint line. According to the preparation method of the array substrate, electrostatic breakdown of the array substrate in the preparation process can be avoided.

Description

technical field [0001] The present disclosure relates to the field of display technology, in particular to an array substrate and a preparation method thereof. Background technique [0002] The oxide thin film transistor uses an oxide semiconductor material as an active layer, which has good uniformity and is especially suitable for large-area display requirements. When forming the active layer of the oxide thin film transistor, it is necessary to deposit an oxide semiconductor material layer covering the entire substrate first, and then perform patterning on the oxide semiconductor material layer. [0003] However, the oxide semiconductor material layer is prone to generate and accumulate static electricity in the exposure machine, which may cause electrostatic breakdown (ESD), resulting in reduced yield of the array substrate. [0004] The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure an...

Claims

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Application Information

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IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/1222H01L27/1225H01L27/1259H01L27/127G02F1/136204H01L27/0288H01L27/124H01L27/1248H10K59/1315H10K59/1201
Inventor 林滨曾勇霍亚洲李梁梁陈周煜
Owner FUZHOU BOE OPTOELECTRONICS TECH CO LTD
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