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Multi-unit communication test system realized based on FPGA

A communication test and multi-unit technology, applied in the field of network communication, can solve problems such as insufficient communication speed and insufficient number of serial ports, and achieve the effects of high test efficiency, large number of serial ports, and strong scalability

Active Publication Date: 2019-12-10
SOUTH CHINA UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to solve the simulation test problem of high-speed rail communication, by above-mentioned analysis, the microcomputer with CPU structure such as single-chip microcomputer has various defects, can not undertake this task well, in view of this, the present invention provides a kind of realization based on FPGA The multi-unit communication test system adopts the FPGA that can be executed in parallel instead of the single-chip microcomputer as the main control chip of the communication circuit to solve the problem of insufficient number of serial ports and insufficient communication speed. At the same time, the FPGA can be programmed and controlled by the host computer, which improves the flexibility of the system. and adaptability, human-computer interaction is also enhanced

Method used

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  • Multi-unit communication test system realized based on FPGA
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  • Multi-unit communication test system realized based on FPGA

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Experimental program
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Embodiment

[0036] Such as figure 1 As shown, a multi-unit communication test system based on FPGA, including resource board, PLC module and host computer. The resource board mainly includes FPGA circuit, drive circuit, Ethernet module, AC bus analog circuit, DC power supply circuit, clock circuit and reset circuit; PLC module includes 20 client sub-units PLC1-PLC20, 20 working display lights LED1-LED20 , 20 switches S1-S20 and 1 server subunit PLC21, wherein one client subunit corresponds to one work display light, and both the client subunit and the server subunit belong to the PLC unit.

[0037] In the resource board, the drive circuit, the clock circuit and the reset circuit are connected to the FPGA circuit; the FPGA circuit is connected to the Ethernet module.

[0038] The client subunit PLC1-PLC20, work display lamp LED1-LED20 and server subunit PLC21 of the PLC module are connected to the drive circuit in the resource board; the TX and RX ports of each PLC unit are connected to t...

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Abstract

The invention discloses a multi-unit communication test system realized based on FPGA. The multi-unit communication test system comprises a resource board, a PLC module and an upper computer. The resource board comprises an FPGA circuit, a drive circuit, an Ethernet module, an AC bus analog circuit, a DC power supply circuit, a clock circuit and a reset circuit. The PLC module comprises 20 clientside subunits PLC1-PLC20, and each client side subunit is provided with a work display lamp LED1-LED20, a switch S1-S20 and a server subunit PLC21. A client subunit, a work display lamp and a server subunit of the PLC module are connected with a drive circuit of the resource board; the drive circuit, the clock circuit and the reset circuit are connected with the FPGA circuit, and the FPGA circuitis connected with the Ethernet module. The system has the advantages that the number of serial ports is large, the communication speed is high, the test efficiency is high, and real-time programming control can be achieved through the upper computer, communication between the PLC units and communication between the upper computer and the PLC units are achieved on the basis of the FPGA chip, and the purpose of simulating the communication environment needed by a test to the maximum degree is achieved.

Description

technical field [0001] The invention belongs to the technical field of network communication, and in particular relates to a structure and a method for performing data communication between various PLC units and between a host computer and a PLC unit through an FPGA chip. Background technique [0002] High-speed rail technology is a rapidly developing emerging industry. To ensure its safe and reliable operation, good data exchange communication is inseparable. Generally speaking, it is unrealistic to conduct communication tests directly on high-speed rail, and the cost is high. It is necessary to simulate the environment of high-speed rail communication through certain technical means to test the status and reliability of communication. With the development of science and technology, especially communication technology and network transmission technology, it is possible to simulate the communication of multiple carriages of high-speed rail. [0003] The traditional communic...

Claims

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Application Information

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IPC IPC(8): H04L12/24H04L12/26H04B17/391
CPCH04L43/50H04L41/145H04B17/3912
Inventor 胡帅邱磊鑫陈杰隆陶薮元刘建业刘晓瑛
Owner SOUTH CHINA UNIV OF TECH