Decoding system of biss-c protocol based on FPGA

A technology of biss-c and decoding system, which is used in measurement devices, instruments, electrical digital data processing, etc., and can solve the problems of difficult to accurately estimate time delay and difficult time synchronization

Inactive Publication Date: 2020-04-28
NAT INST OF METROLOGY CHINA
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Problems solved by technology

[0003] However, in the traditional accuracy evaluation test, the angle information of the turntable is sent to the user through the upper computer software of the turntable, and the time delay is difficult to

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  • Decoding system of biss-c protocol based on FPGA
  • Decoding system of biss-c protocol based on FPGA
  • Decoding system of biss-c protocol based on FPGA

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Embodiment Construction

[0051] The data protocol biss-c is an open digital interface protocol launched by ic-haus in 2002. The biss-c interface protocol provides a two-way fast communication standard for sensors and actuators. It can be implemented with simple hardware. Suitable for real-time data acquisition. Compared with other interfaces, it has leading advantages in openness, high speed, networking mode, and line delay compensation. The decoding of the biss-c interface protocol can be realized by hardware decoding, software decoding or mixed decoding. Compared with software decoding, hardware decoding can provide higher communication speed and save the cost of external logic circuits.

[0052] The biss-c interface protocol is an open full-duplex synchronous serial communication protocol, which consists of point-to-point networking and bus mode. In point-to-point mode, the master interface is only connected to the slave interface. The master interface provides the clock to the slave interface...

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Abstract

The invention discloses a decoding system of a biss-c protocol based on an FPGA, and belongs to the technical field of inertial navigation systems. The system comprises a BISS-C encoder used for providing a position request and clock information for an absolute encoder, providing position acquisition data synchronized with a clock signal after the clock signal is received, and providing the position acquisition data to a data acquisition module; the data acquisition module, which is used for receiving slo position data of a turntable and navigation data of an inertial system; an encoding module, which is used for encoding according to the position data and the navigation data received by the data acquisition module to obtain encoded data; and a decoding module, which is used for decoding the encoded data received from the encoding module to obtain decoded data. The system has important significance for improving the test quality of an inertial navigation system.

Description

technical field [0001] The invention relates to the technical field of inertial navigation system calibration, in particular to a decoding system based on FPGA-based biss-c protocol. Background technique [0002] The attitude accuracy of a high-precision inertial navigation system is a key indicator to measure its long-term navigation performance. Usually, before using high-precision inertial navigation, its accuracy must be evaluated. The attitude accuracy evaluation not only gives the attitude accuracy index of the high-precision inertial navigation system, but also provides a basis for the accuracy analysis of the weapon platform. Therefore, it is of great significance to establish a simulation test system to simulate the movement of the carrier and combine it with the vehicle test to improve the test quality of the inertial navigation system. The precision evaluation equipment commonly used at home and abroad is a high-precision turntable. Absolute encoders are common...

Claims

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Application Information

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IPC IPC(8): G06F13/42G01C25/00
CPCG01C25/005G06F13/4282
Inventor 叶文蔡晨光刘志华夏岩
Owner NAT INST OF METROLOGY CHINA
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