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Data processing method, device and terminal based on ldpc encoder

A data processing and encoder technology, applied in the direction of encoding, encoding components, data representation error detection/correction, etc., can solve the problems of high complexity, large storage G matrix, and difficult implementation, so as to simplify time, solve calculation overhead, The effect of improving efficiency

Active Publication Date: 2021-07-09
南京中科晶上通信技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Among them, the general implementation of LDPC coding is the RU and LU coding algorithms, which convert the check code matrix of the LDPC code into a lower triangular or approximate lower triangular form, and use an iterative algorithm to reduce the complexity of coding when calculating the check bit information , but its encoding complexity is proportional to the square of the code length, the complexity is high, and the storage G matrix is ​​also huge, so it cannot adapt to the needs of different encoding rates
In addition, in the related art, the codeword parameters of the LDPC codes generally constructed by the random method are flexible, but there is no certain code structure, the coding complexity is too high, and it is not easy to realize in engineering, such as using FPGA, DSP, etc.
The LDPC code realized by a certain coding structure has a cyclic or quasi-cyclic structure. The coding is very simple and shows good performance. However, the parameter selection of code length and code rate is greatly restricted.

Method used

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Experimental program
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Embodiment 3

[0108] An embodiment of the present application provides a terminal, including: a memory, a processor, and a computer program stored on the memory and operable on the processor. When the processor executes the computer program, the above data processing method based on the LDPC encoder is implemented. .

[0109] Specifically, the processor may be a CPU, a general processor, DSP, ASIC, FPGA or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute the various illustrative logical blocks, modules and circuits described in connection with the present disclosure. The processor can also be a combination of computing functions, for example, a combination of one or more microprocessors, a combination of DSP and a microprocessor, and the like.

[0110] Specifically, the processor is connected to the memory through a bus, and the bus may include a path for transmitting information. The bus can be a PCI b...

Embodiment 4

[0115] An embodiment of the present application provides a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are used to execute the above data processing method based on an LDPC encoder.

[0116] In the embodiment of the present application, the source bit stream to be processed is obtained, and the pre-edited configuration information is determined, so that the target code table is determined among the pre-stored multiple code tables according to the configuration information, and the source bit stream is grouped, And according to the grouping results, the target code table is constructed as a corresponding parity check matrix to determine the corresponding index addresses of the parity bits in the parity check matrix for each group, so that according to the corresponding index addresses of the parity bits in the parity check matrix for each group The index address of the source bit stream is determined t...

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Abstract

Embodiments of the present application provide an LDPC encoder-based data processing method, device, terminal, and storage medium. The method includes: obtaining the source bit stream to be processed, and determining the pre-edited configuration information; based on the configuration information, determining the target code table in a plurality of pre-stored code tables; grouping the source bit stream according to the configuration information, And construct the target code table into a corresponding parity check matrix according to the grouping result; determine the respective index addresses for the check bits in the parity check matrix corresponding to each group; The address determines the parity bits corresponding to each information bit of the source bit stream, and performs encoding processing to obtain an LDPC code. In the embodiment of the present application, the check matrix is ​​constructed by grouping to determine the index address matrix for the check matrix, which solves the calculation overhead caused by the continuous access code in the prior art, and improves the efficiency of the LDPC encoder.

Description

technical field [0001] The present application relates to the technical field of wireless communication, and in particular to a data processing method, device, terminal and storage medium based on an LDPC encoder. Background technique [0002] The DVB-S2 standard is the most widely used second-generation digital TV broadcast satellite standard in the world. It mainly uses BCH and LDPC concatenated codes for channel coding, that is, the output of BCH is the input of LDPC. Among them, the general implementation of LDPC coding is the RU and LU coding algorithms, which convert the check code matrix of the LDPC code into a lower triangular or approximate lower triangular form, and use an iterative algorithm to reduce the complexity of coding when calculating the check bit information , but its encoding complexity is proportional to the square of the code length, the complexity is high, and the storage G matrix is ​​also very large, so it cannot meet the needs of different encodin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
CPCH03M13/1102
Inventor 赵峰邓红梅王本庆苏泳涛胡金龙
Owner 南京中科晶上通信技术有限公司