3D stacked memory, clock skew elimination method and clock skew elimination circuit

A clock skew and circuit elimination technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of large storage standby power consumption, reduce standby loss, eliminate pin skew error, accuracy and reliability. Reliable effect

Active Publication Date: 2020-05-19
SHENZHEN STATE MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of this, the embodiment of the present application provides a clock skew elimination method for a 3D stacked memory, a clock skew elimination circuit for a 3D stacked memory,

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  • 3D stacked memory, clock skew elimination method and clock skew elimination circuit
  • 3D stacked memory, clock skew elimination method and clock skew elimination circuit
  • 3D stacked memory, clock skew elimination method and clock skew elimination circuit

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Embodiment Construction

[0032] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0033] In recent years, the accumulation of big data, the innovation of theoretical algorithms, the improvement of computing power and the evolution of network facilities have made the artificial intelligence industry, which has been accumulated for more than half a century, usher in revolutionary progress again, and the research and application of artificial intelligence have entered the A new stage of development; with the active promotion of the government and the industry, artificial intelligence technology has advanced by leaps and bounds in large-scale industrial appl...

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Abstract

The invention discloses a clock skew elimination method of a 3D stacked memory, a clock skew elimination circuit of the 3D stacked memory and the 3D stacked memory. The clock skew elimination method comprises the following steps: generating a preset digital clock phase according to an original signal phase of a write data gating pin and original signal phases of all data pins, so as to enable thepreset digital clock phase to lag behind the original signal phase of the data gating pin and the original signal phase of each data pin; comparing the original signal phase of each data pin with a preset digital clock phase, and delaying the original signal phase of each data pin to ensure that the signal phase of each data pin is consistent with the preset digital clock phase. According to the embodiment, delay control is carried out on each data pin according to the preset digital clock phase, so that pin deflection is eliminated, and the data transmission reliability of the 3D stacked memory is improved.

Description

technical field [0001] The present application belongs to the technical field of electronic circuits, and in particular relates to a clock skew elimination method for a 3D stacked memory, a clock skew elimination circuit for a 3D stacked memory, and a 3D stacked memory. Background technique [0002] With the rapid development of electronic technology, large-scale integrated circuits have gradually been widely used in the daily industrial production process. Since electronic equipment will generate a large amount of data input and output during work, in order to ensure the stability and safety of electronic equipment Therefore, it is necessary to store and retain the data transmitted by the electronic equipment in real time, so as to control the electronic equipment in real time according to the stored data; therefore, the storage security and storage capacity of the data will play an important role in the circuit control process of the electronic equipment. Extremely importa...

Claims

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Application Information

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IPC IPC(8): G11C7/22
CPCG11C7/222
Inventor 邓玉良朱晓锐殷中云方晓伟杨彬庄伟坚苏通李昂阳
Owner SHENZHEN STATE MICROELECTRONICS CO LTD
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