Full GaN integrated half-bridge dead time adjusting circuit

Abstract

The invention discloses a full GaN integrated half-bridge dead time adjusting circuit. Full GaN integrated basic digital logic gate circuits, namely a NOT gate sub-circuit, a NAND gate sub-circuit anda NOR gate sub-circuit, are realized through an enhanced GaN power transistor, and the basic digital logic gate circuits and GaN-based diodes are further utilized to realize a full GaN integration half-bridge dead time adjusting circuit. According to the circuit, a punch-through phenomenon caused by simultaneous opening of a high-side power device and a low-side power device in a half-bridge structure is effectively avoided, meanwhile, dead time of the half-bridge structure is effectively adjusted by changing a resistance and a capacitance, and a foundation is laid for industrialization of full GaN integration of a driving stage and a power stage in a power conversion circuit in the future.

Description

technical field [0001] The invention belongs to the technical field of GaN power devices, and in particular relates to the design of an all-GaN integrated half-bridge dead-time adjustment circuit. Background technique [0002] As a third-generation semiconductor material, GaN is widely used in the field of power electronics technology due to its excellent characteristics such as high breakdown electric field and high electron mobility. Compared with traditional Si devices, GaN HEMT power switching devices have the advantages of high frequency, high power density, and low loss in power conversion systems. After years of development, GaN power devices have become more and more widely used, ranging from automotive Lidar systems to consumer electronics chargers. [0003] The enhanced GaN device has three electrodes, which are the gate, the drain and the source, and its threshold voltage VTH is generally 0.5V to 2V. When the gate-source voltage VGS is greater than the threshold ...

AI Technical Summary

Problems solved by technology

Traditional GaN gate circuits integrate depletion-mode devices and enhancement-mode devices together, which not only increases the difficulty of the process, but also because the depletion-mode devices are turned off by negative voltage, the driving circuit needs to output voltages of positive and negative polarities, which Brings difficulty to the design of all-GaN digital circuits

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