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Efficient bit flipping decoder based on self-adaptive threshold value

An adaptive threshold and bit flipping technology, applied in the field of decoder design, can solve problems such as unsuitable application scenarios and increase overall complexity, and achieve the effects of reducing decoding delay, high throughput, and accurately matching the decoding process

Pending Publication Date: 2020-06-02
NANJING UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the resulting floating-point operations greatly increase the overall complexity, and are not suitable for some application scenarios that are difficult to generate soft messages, such as NAND Flash Memory
Based on this, we restrict the application scenario to Binary Symmetric Channel (BSC), where only hard decision messages are available

Method used

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  • Efficient bit flipping decoder based on self-adaptive threshold value
  • Efficient bit flipping decoder based on self-adaptive threshold value
  • Efficient bit flipping decoder based on self-adaptive threshold value

Examples

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Embodiment

[0028] Embodiment: Take the codeword whose code length is 1296, code rate is 1 / 2, column weight is 3, and row weight is 6 as an example. Figure 4 It is a schematic diagram of the performance simulation of the decoder of the present invention. The maximum number of iterations for all BF algorithms is set to 300, and the maximum number of iterations for the OMS algorithm is set to 20. It can be seen that compared with the current optimal TRGDBF algorithm, the SABF disclosed in the present invention can improve the performance by an order of magnitude while having a shorter critical path. When the maximum number of iterations is increased to 1000, the performance of SABF can be further improved by an order of magnitude, and the decoding performance of OMS algorithm can be achieved. In addition, the proposed SABF decoder architecture is described in Verilog language, and the obtained RTL is synthesized with Synopsys tools. The technology used is TSMC 90nm CMOS technology. Figu...

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Abstract

The invention discloses a bit flipping (BF) decoder for a low-density parity check code under a binary symmetric channel. The BF decoder is called a self-adaptive threshold value BF decoder. In orderto solve the problem that the clock frequency of an existing BF decoder is limited by global maximum value search operation, a self-adaptive threshold value is designed to screen bits needing to be overturned. By utilizing the messages obtained in the previous iteration, the calculation process of the threshold value can be performed in parallel with other decoding operations, and therefore a critical path is greatly shortened. In order to further improve the performance, the proposed decoder adopts a non-uniform flipping criterion. The invention also discloses a hardware architecture for realizing the proposed decoder, and a comprehensive result is given. Design examples show that the disclosed decoder can achieve maximum throughput and best decoding performance as compared with other BFdecoders.

Description

[0001] Technical field [0002] The invention relates to the design of a decoder in the technical field of communication coding, and is particularly aimed at the algorithm design and hardware implementation of a high-performance, high-throughput bit-flip decoder under a binary symmetric channel. Background technique [0003] Low Density Parity Check Code (LDPC) has been extensively researched and applied in many communication standards for a long period of time due to its decoding performance close to the Shannon limit and the advantages of high parallelism. Among all the decoding algorithms of LDPC codes, the Belief Propagation algorithm (BP) shows the best performance, but its decoding complexity is relatively high, which is not conducive to hardware implementation. In order to reduce the complexity of the BP algorithm, the minimum sum algorithm (MS) and the modified minimum sum algorithm (OMS) have been proposed successively, which can significantly reduce the decoding comp...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11H03M13/35
CPCH03M13/1105H03M13/35
Inventor 王中风崔航轩林军
Owner NANJING UNIV
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