Chip-level integrated microfluidic cooling module and preparation method
A technology of heat dissipation module and microfluid, which is applied in semiconductor/solid state device manufacturing, semiconductor device, electric solid state device, etc., can solve the problem of low reliability of chip heat dissipation module, achieve volume reduction, improve heat dissipation capacity, and improve reliability Effect
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[0042] In order to realize the above idea, the present invention provides a chip-level integrated microfluidic heat dissipation module and a preparation method, wherein the chip-level integrated microfluidic heat dissipation module includes: a package body and a substrate layer arranged on top of each other; The body has a first semi-open three-dimensional chamber on the side facing the substrate layer; a liquid cooling plate is accommodated in the first semi-open three-dimensional chamber; wherein the liquid cooling plate is facing the package One side of the body has a second semi-open three-dimensional chamber; the heat source chip is accommodated in the second semi-open three-dimensional chamber; the side of the liquid cooling plate facing the substrate layer has a first vertical through-hole A microchannel and a second vertical penetrating microchannel; the substrate layer has a third vertical penetrating microchannel, and the third vertical penetrating microchannel is res...
Embodiment 3
[0056] This embodiment also provides a method for preparing a chip-level integrated microfluidic heat dissipation module, such as Figures 2 to 10 As shown, the preparation method of the chip-level integrated microfluidic heat dissipation module includes: performing etching on the first surface of the liquid cooling plate 10 to form a second semi-open three-dimensional chamber 21; The heat source chip 20 is placed in the three-dimensional chamber 21; the second semi-open three-dimensional chamber 21 is sealed; the second surface of the liquid cooling plate 10 is etched to form the first vertical through-microchannel 12 and the second Vertically penetrating microchannel 13; providing a substrate layer 30, etching the substrate layer 30 to form a third vertical penetrating microchannel 31; aligning the third vertical penetrating microchannel 31 with the first vertical penetrating microchannel 12 and the second vertical penetration microchannel 13, the substrate layer 30 and the ...
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