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Packaging method

A packaging method and a technology of plastic sealing layer, which are applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems that the performance of the packaging structure needs to be improved, and achieve the effects of good overall quality uniformity, improved thickness uniformity, and high thickness uniformity

Active Publication Date: 2022-07-08
NINGBO SEMICON INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The performance of the packaging structure formed by the packaging method of the prior art still needs to be improved

Method used

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Experimental program
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Embodiment Construction

[0013] It can be known from the background art that the performance of the package structure manufactured by using the existing package method needs to be improved.

[0014] Now combined with a packaging method to analyze, the packaging method is fan-out wafer-level packaging fake and inferior, Figure 1 to Figure 4 It is a schematic cross-sectional structure diagram of a fan-out wafer-level packaging process, and the packaging method includes the following steps:

[0015] refer to figure 1 , a substrate 10 is provided, the substrate 10 has a plurality of chips 20, and the chips 20 have an electrical connection structure 30 inside, the surface of the chip 20 exposes the surface of the electrical connection structure 30, and the surface of the electrical connection structure 30 is exposed between the adjacent chips 20. A plastic encapsulation layer 40 is formed on the substrate 10 ; a redistribution-layer (RDL, Redistribution-Layer) 50 is formed on the surface of each chip 20 ...

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Abstract

The invention provides a packaging method, which includes: forming a redistribution layer in contact with an electrical connection structure on the front side of each chip; forming a limit layer on the redistribution layer and the plastic sealing layer, and the limit layer has a plurality of openings; A selective spraying process is performed, and solder is sprayed into the opening to form a solder layer that fills the opening. The method for the selective spraying process includes: providing a movable spray head; using the spray head above the chip and the plastic sealing layer When the nozzle moves over the opening, the nozzle sprays solder to the opening, and the nozzle moves over the same opening at least twice to form a solder layer, and the solder layer is electrically connected to the redistribution layer. connecting; removing the limiting layer; after removing the limiting layer, performing a reflow process on the solder layer to form solder balls. The present invention utilizes selective spraying treatment to form the solder balls required for packaging, improves the overall quality uniformity of the solder balls, and further improves the packaging effect.

Description

technical field [0001] The present invention relates to the technical field of semiconductor packaging, in particular to a packaging method. Background technique [0002] With the development trend of VLSI, the feature size of integrated circuits continues to decrease, and people's requirements for the packaging technology of integrated circuits continue to increase accordingly. Existing packaging technologies include Ball Grid Array (BGA), Chip Scale Package (CSP), Wafer Level Package (WLP), 3D Packaging (3D) and System in Package (System in Package). Package, SiP) etc. [0003] The formation of solder balls is one of the key technologies in the packaging process. The solder balls are electrically connected to the electrical connection structure in the chip, and the positions and numbers of input / output pins of the package structure are rearranged by using the solder balls, so as to facilitate the electrical connection between the package structure and external circuits o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56H01L21/60
CPCH01L21/50H01L21/561H01L24/97H01L2224/97
Inventor 秦晓珊
Owner NINGBO SEMICON INT CORP