High-cardinal-number approximate Booth encoding method and mixed-cardinal-number Booth encoding approximate multiplier

A technology of mixed radix and encoding method, applied in the direction of electrical digital data processing, digital data processing components, instruments, etc., can solve the problems of unfavorable product compression module design, complex coding circuit circuit, and large number of partial products, etc.

Active Publication Date: 2020-08-04
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

Traditional accurate Booth coded multipliers usually use low-radix Booth codes to generate partial products. Although the coding unit is relatively simple, the number of coding units required is large, and the number of partial products generated is large, whic

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  • High-cardinal-number approximate Booth encoding method and mixed-cardinal-number Booth encoding approximate multiplier

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Embodiment Construction

[0055] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0056] The invention proposes a novel high-radix approximation Booth encoding method, which can significantly reduce the hardware complexity of the encoding circuit and the partial product compression circuit. For an n-bit multiplier and an n-bit multiplicand, the high-radix approximate Booth encoding method proposed by the present invention encodes m bits with lower weights in the multiplicand, and combines the n-bit multiplier to obtain a partial product. In multiplication and addition operations, the closer the data is to the most significant bit, the greater the impact on the final result. Therefore, although the number of digits required by Booth codes of three kinds of high bases of base-64, base-256, and base-1024 in the low significant digit part are respectively 6, 8, and 10 bits, the present invention only takes the upper 4 bits there...

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Abstract

The invention discloses a high-cardinal-number approximate Booth encoding method and a mixed-cardinal-number Booth encoding approximate multiplier, and belongs to the technical field of integrated circuits. According to the high-cardinal-number approximate Booth encoding method, m bits with lower weights in n-bit multiplicand are encoded, two incomplete partial products A and B are obtained in combination with the n-bit multiplicand, and an approximate encoding result is obtained after addition. The mixed-radix Booth coding approximate multiplier is combined with a precise Booth coding moduleand a high-radix approximate Booth coding module to respectively obtain a precise partial product and an approximate partial product; a partial product array is formed by combining sign extension bitsgenerated by a sign bit extension algorithm provided by the invention, the final calculation result of the approximate multiplier is obtained by compressing and adding the partial product array, andin addition, an error model of the approximate multiplier is deduced to obtain a precision index. The structural complexity of the multiplier is reduced while high calculation precision is guaranteedthrough high-cardinal-number approximate Booth encoding, and hardware design is simplified due to the fact that symbol extension bits avoid accumulation of a large number of identical numbers.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and relates to a high-radix approximate Booth coding method and a mixed-radix Booth code approximate multiplier based on the high-radix approximate Booth coding method. Background technique [0002] With the rise of new technologies such as big data, cloud computing, and the Internet of Things, computer systems are increasingly being used to interact with the physical world. Although semiconductor technology and low-power design techniques are also developing, the total energy consumption of computer systems is still growing at an alarming rate in order to process the ever-increasing amount of information. Nowadays, power consumption and energy consumption have become important factors that have to be considered in chip design. For high-performance computing equipment, such as servers, high-performance processors, etc., excessive power consumption will cause serious heat dissipation ...

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Application Information

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IPC IPC(8): G06F7/533
CPCG06F7/5338Y02D10/00
Inventor 贺雅娟衣溪琳朱飞宇侯博文张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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