Implementation method and implementation system of multi-channel digital isolation chip
A technology of digital isolation and implementation method, which is applied in the direction of bidirectional operation logic circuit coupling/interface, logic circuit coupling device, power consumption reduction, etc., which can solve the problems of high chip cost, increase of total system power consumption, etc. , to achieve the effect of reducing quantity, reducing cost and power consumption, and reducing size and area
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[0043] The present invention will be described in detail below in conjunction with specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.
[0044] Such as Figure 2A , Figure 2B As shown, the implementation method of the multi-channel digital isolation chip provided by an embodiment of the present invention, the method includes: adding encoders and decoders that match each other at both ends of the isolator;
[0045] Determine the number of isolators according to the number of system transmission signal channels;
[0046] Determine the number of coding patterns of the encoder according to the number of transmission signal channels of the system and the number of isolators;
[0047] Among them, nn >2 m, m≥2, m represents the number of ...
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