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Implementation method and implementation system of multi-channel digital isolation chip

A technology of digital isolation and implementation method, which is applied in the direction of bidirectional operation logic circuit coupling/interface, logic circuit coupling device, power consumption reduction, etc., which can solve the problems of high chip cost, increase of total system power consumption, etc. , to achieve the effect of reducing quantity, reducing cost and power consumption, and reducing size and area

Active Publication Date: 2021-06-01
SUZHOU NOVOSENSE MICROELECTRONICS CO LTD
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  • Abstract
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  • Claims
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Problems solved by technology

[0004] as above figure 1 In the conventional method for realizing bidirectional multi-channel digital isolation chip provided in the prior art shown, the simple multi-channel integration method will significantly increase the size and area of ​​the digital isolation chip, and this effect will increase with the number of channels It is becoming more and more obvious that the cost of the chip is too high, which ultimately affects the total volume and total cost of the system; on the other hand, each isolation channel is independently performing signal transmission, which will significantly increase the system without optimization. Total power consumption, affecting system transmission performance and reliability

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  • Implementation method and implementation system of multi-channel digital isolation chip
  • Implementation method and implementation system of multi-channel digital isolation chip
  • Implementation method and implementation system of multi-channel digital isolation chip

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Embodiment Construction

[0043] The present invention will be described in detail below in conjunction with specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0044] Such as Figure 2A , Figure 2B As shown, the implementation method of the multi-channel digital isolation chip provided by an embodiment of the present invention, the method includes: adding encoders and decoders that match each other at both ends of the isolator;

[0045] Determine the number of isolators according to the number of system transmission signal channels;

[0046] Determine the number of coding patterns of the encoder according to the number of transmission signal channels of the system and the number of isolators;

[0047] Among them, nn >2 m, m≥2, m represents the number of ...

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Abstract

The present invention provides a method and system for realizing a multi-channel digital isolation chip. The method includes: adding mutually matched encoders and decoders at both ends of the isolator, and configuring the number of isolators according to the number of system transmission signal channels; According to the number of system transmission signal channels and the number of isolators, configure the number of code patterns of the encoder; where, n<m, C n >2 m , m≥2, m represents the number of transmission signal channels in the system, n represents the number of isolators, C represents the number of coding patterns used by the encoder; The source data is encoded to form an encoded signal and then sent to the isolator; the receiving end receives the encoded signal, decodes it, reconstructs it and restores it to the original multi-channel signal, and then outputs it. The invention reduces the size and area of ​​the digital isolation chip by reducing the number of digital isolators.

Description

technical field [0001] The invention belongs to the field of isolation technology design, and mainly relates to a method and system for realizing a multi-channel digital isolation chip. Background technique [0002] A digital isolation chip is a chip that transmits digital signals between two electrically isolated voltage domains. It can provide electrical isolation for equipment, isolate ground loops and noise, and improve the anti-interference ability of the interface. With the improvement of system performance requirements for high data rate and high throughput, half-duplex / full-duplex communication, multi-channel parallel transmission, etc., the demand for multi-channel digital isolation chips is becoming more and more complex. [0003] combine figure 1 Shown, prior art provides, is used for realizing the conventional method of bidirectional multi-channel digital isolation chip; figure 1 In the example shown, the independent single-channel digital isolators are copied ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0175
CPCH03K19/0008H03K19/017545H03K19/017572H03K19/01759
Inventor 张昊盛云叶健
Owner SUZHOU NOVOSENSE MICROELECTRONICS CO LTD