FPGA device of network-on-chip is formed using silicon connection layer

Abstract

The invention discloses an FPGA device for forming a network-on-chip by using a silicon connection layer, relating to the technical field of FPGA. An active silicon connection layer is designed in theFPGA device. A silicon connection layer interconnection frame is arranged in the silicon connection layer, and each bare chip function module in the FPGA bare chip is accessed to the silicon connection layer interconnection framework to form an on-chip network together with the silicon connection layer interconnection framework; each bare chip function module, a network interface in the silicon connection layer interconnection framework and the router form an NOC node; and the NOC nodes are communicated with each other, so that the bare chip function modules in the FPGA bare chip without thebuilt-in NOC network can be efficiently interconnected and communicated through the silicon connection layer interconnection framework, and the processing difficulty is reduced on the basis of improving the data transmission bandwidth and performance in the FPGA device.

Description

technical field [0001] The invention relates to the field of FPGA technology, in particular to an FPGA device which utilizes a silicon connection layer to form an on-chip network. Background technique [0002] FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array) is a hardware programmable logic device, which is widely used in mobile communication, data center, navigation guidance and automatic driving and other fields. With the increasing demand for bandwidth, storage and data processing capabilities of new applications, there are currently some ways to integrate NOC networks inside FPGA chips to improve communication performance, but the production is difficult and difficult to promote at present, and this method will take up precious resources. chip area. Contents of the invention [0003] The present inventor proposes a kind of FPGA device that utilizes silicon connection layer to form network-on-chip for above-mentioned problem and technical deman...

AI Technical Summary

Problems solved by technology

With the increasing demand for bandwidth, storage and data processing capabilities of new applications, there are currently some ways to integrate NOC networks inside FPGA chips to improve communication performance, but the production is difficult and difficult to promote at present, and this method will take up precious resources. chip area

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