Process method of trench of shield gate trench type MOSFET

Abstract

The invention discloses a process method of a trench of a shield gate trench type MOSFET, and the method comprises the following steps: 1, performing depositing to form a hard mask layer on a semiconductor substrate, performing etching to form a plurality of trenches, forming dielectric layers in the trenches, depositing and filling polycrystalline silicon, and forming a lower electrode in the trenches after back etching is finished; 2, depositing and forming a protective dielectric layer on the upper half part of the trench; 3, integrally depositing a polycrystalline silicon interlayer oxidelayer in the trench; 4, carrying out a CMP process on the deposited polycrystalline silicon interlayer oxide layer; 5, continuously carrying out an etching process on the polycrystalline silicon interlayer oxide layer to enable the residual polycrystalline silicon interlayer oxide layer in the trench to reach a designed thickness, thereby forming an isolation dielectric layer between the upper polycrystalline silicon and the lower polycrystalline silicon. According to the process method, the side wall of the trench, especially the corner of the top of the trench, is protected through the protective oxide layer, so the nearly vertical morphology of the side wall of the trench can be obtained, and the problem of short channels of the trench is solved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a process method for shielding the trench of a gate trench type MOSFET. Background technique [0002] Trench-type double-layer gate MOS, as a power device, has the characteristics of high breakdown voltage, low on-resistance, and fast switching speed. The structure of the shielded gate trench MOSFET is divided into upper and lower parts. The lower half of the trench is filled with polysilicon as the source, and the polysilicon in the upper half of the trench is the gate. separated by an oxide layer. Its characteristic is that the polysilicon filled in the source trench only accounts for about half of the internal space of the trench, so that the source contact hole needs to be made deeper to contact the polysilicon filled in the lower part of the trench. The process method of this device is to first deposit a layer of oxide layer on the silicon subs...

AI Technical Summary

Problems solved by technology

This kind of morphology is implanted deeper into the junction when the channel source region is implanted later, which causes problems such as short channels, and shows the saturation leakage current I of the device when the probe test is performed in the later stage. DSS too large and the threshold voltage V th Instability and other issues

Images