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Three-dimensional NAND ferroelectric memory and preparation method thereof

A ferroelectric memory, three-dimensional technology, applied in the field of memory, can solve the problems of inconvenient wiring, small readout current, insufficient reliability, etc.

Pending Publication Date: 2020-10-20
XIANGTAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a three-dimensional NAND ferroelectric memory and its preparation method to solve the problems of inconvenient wiring, low readout current and insufficient reliability in the prior art

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  • Three-dimensional NAND ferroelectric memory and preparation method thereof
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  • Three-dimensional NAND ferroelectric memory and preparation method thereof

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Embodiment Construction

[0037] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the specific embodiments and the accompanying drawings. It should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present invention.

[0038] Obviously, the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0039] In the description of the present invention, it should be noted that the terms "first", "second" and "third" are only u...

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Abstract

The invention discloses a three-dimensional NAND ferroelectric memory and a preparation method thereof, and the three-dimensional NAND ferroelectric memory comprises a substrate layer (1), a conductive layer (2) and a stacked layer which are sequentially stacked, and the stacked layer comprising a plurality of isolation layers and a plurality of control gate electrode layers which are stacked; anda plurality of channel groups, each channel group in the plurality of channel groups comprising two channels; the two channels being arranged in a manner of penetrating through the laminated layer; the bottom ends of the two channels being embedded into the conductive layer (2). The bottom ends of the two channels are communicated, a separation layer (6) for separating the control gate electrodelayers of the two channels is arranged between the two channels, and a buffer layer (7), a ferroelectric film layer (8), a channel layer (9) and a channel group (5) formed by connecting a plurality offerroelectric field effect transistors (13) in series are sequentially arranged on the inner walls of the channels. More compact wiring can be obtained through channel group arrangement of the memory, higher-density integration is realized, and the reliability is higher.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a three-dimensional NAND ferroelectric memory and a preparation method thereof. Background technique [0002] Transistor-type ferroelectric memory - ferroelectric field effect transistor (FeFET) is to replace the gate dielectric layer in field effect transistor (MOSFET) with ferroelectric thin film material, and control the conduction of channel current by changing the polarization direction of ferroelectric thin film material. On and off, so as to realize the storage of information. FeFET memory has the advantages of non-volatility, low power consumption, fast read and write speed, simple cell structure and high theoretical storage density. Therefore, FeFET memory is considered to be one of the most potential new types of memory. [0003] Three-dimensional integration is an important direction for realizing high-density FeFET memory. However, the three-dimensional FeFET memory...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11507H01L27/11509H01L27/11514H01L29/66H01L29/78H01L29/786H01L21/34H10B53/30H10B53/20H10B53/40
CPCH01L29/78391H01L29/78693H01L29/66969H10B53/40H10B53/20H10B53/30
Inventor 曾斌建周益春廖敏
Owner XIANGTAN UNIV
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