A reliability self-test circuit and method for PD PUF output response

Abstract

The present invention relates to circuit design technology, in particular to a reliability self-inspection circuit and method for RO PUF output response, including RO array module, control signal K and S, counter module, enable signal, excitation signal C i , a self-test module, a comparator and a reliability flag generation module; the enable signal is connected to the RO array module and the counter module respectively, and the excitation signal C i Input the RO array module, and the RO array module is sequentially connected to the counter module, the self-test module, the comparator and the reliability flag generation module; the control signals K and S respectively control the self-test module and the reliability flag generation module. The self-test circuit detects the reliability of the output response during the operation of the RO PUF, and outputs a flag bit to identify the reliability. The external circuit selects a reliable PUF response based on the flag bit to construct a digital key. The problem of excessive overhead and potential safety hazards caused by the introduction of an error correction mechanism is avoided.

Description

Technical field[0001]The present invention belongs to the field of circuit design, and more particularly to a reliability self-detection circuit and method for the RO PUF output response.Background technique[0002]The storage of the key in the embedded device is generally placed in a non-volatile memory, and the attacker can directly invade them through physical probing, and the key is easily leaked. It is a very efficient manner that uses the PUF circuit to store the key to store the key to store the key in the Internet terminal device. However, the existing PUF output is generally affected by environmental factors such as voltage temperature, and cannot be used directly for key generation. How to improve PUF output stability is an important research topic.[0003]Since the PUF mainly uses the circuit parameter deviation (e.g., delay time, threshold voltage, etc.) generated by the unavoidable random error introduced during the chip manufacturing process, the more response is generated...

AI Technical Summary

Problems solved by technology

However, the existing PUF output is generally susceptible to environmental factors such as voltage and temperature, and cannot be directly used for key generation

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