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Chip-on-film packaging structure

A technology of film-on-chip packaging and pins, which is applied in the direction of electrical components, electric solid devices, circuits, etc., can solve problems such as increased risk, machine precision error, and difficulty in providing safe space or buffer space, so as to reduce risks and improve The effect of manufacturing yield

Inactive Publication Date: 2020-11-03
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Under the trend of fine pitch (FinePitch), the distance between adjacent bumps will be reduced accordingly. Once machine accuracy error or pin offset occurs, the existing distance between adjacent bumps may be difficult to provide. Sufficient safety space or buffer space, so that the risk of bumps overlapping adjacent pins is greatly increased

Method used

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  • Chip-on-film packaging structure

Examples

Experimental program
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Embodiment Construction

[0053] Figure 1A is a schematic top view of a chip-on-film packaging structure according to an embodiment of the present invention. Figure 1B yes Figure 1A An enlarged schematic view of region A of . Figure 1C yes Figure 1B Schematic cross-sectional view along section line B-B'. In order to clearly show the connection relationship between the pin 120, the chip 130 and the bump 140, Figure 1A The chip 130 and the solder resist layer 150 are shown in perspective, and the encapsulant 160 is omitted.

[0054] Please refer to Figure 1A to Figure 1C , in this embodiment, the film-on-chip packaging structure 100 includes a flexible substrate 110, a plurality of pins 120, a chip 130, and a plurality of bumps 140, wherein the flexible substrate 110 can be made of polyethylene p-phenylene Diformate (polyethylene terephthalate, PET), polyimide (Polyimide, PI), polyethersulfone (PES), polycarbonate (polycarbonate, PC) or other suitable flexible materials. On the other hand, the...

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Abstract

The invention provides a chip-on-film packaging structure. The chip-on-film packaging structure comprises a flexible substrate, a plurality of pins, a chip and a plurality of bumps; wherein the flexible base material is provided with a chip bonding area; the pins are arranged on the flexible base material and comprise a plurality of first pins and a plurality of second pins. The first pins and thesecond pins are arranged in a staggered manner along the first side edge of the chip bonding area. The chip is located in the chip bonding area. The active surface of the chip faces the flexible substrate. The bumps are disposed on the active surface of the chip and include a plurality of first bumps and a plurality of second bumps adjacent to the first edge of the active surface. The first bumpsare bonded to the first pins, the second bumps are bonded to the second pins, and the width of the first bump bonded to one of the first pins is equal to the width of the adjacent second pin.

Description

technical field [0001] The invention relates to a package structure, in particular to a film-on-chip package structure. Background technique [0002] Chip on Film (COF) package structure is a common package type of a driver chip of a liquid crystal display. With the increase in the number of bumps on the chip, the increase in the number of pins and the shrinking of the pitch between the pins, the layout of the bumps and pins is increasingly limited. [0003] As far as the current size design of the bump and the lead is concerned, the width of the bump is designed to be larger than that of the lead, so as to ensure that a sufficient bonding area can be maintained when the bump and the lead are bonded to each other. Under the trend of fine pitch (FinePitch), the interval between adjacent bumps will be reduced accordingly. Once machine accuracy error or pin offset occurs, the existing pitch between adjacent bumps may be difficult to provide. Sufficient safety space or buffer ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L23/49
CPCH01L23/488H01L23/49H01L2224/73204
Inventor 陈崇龙
Owner CHIPMOS TECH INC