SOI field effect transistor capable of reducing side electric leakage and preparation method thereof

Abstract

The invention provides an SOI (silicon on insulator) field effect transistor capable of reducing side leakage and a preparation method of the SOI field effect transistor, and the transistor comprisesa graphical SOI substrate which is provided with a bottom substrate, an insulating layer and a top semiconductor layer in the shape of a semiconductor island, wherein the insulating layer is providedwith a groove; the groove comprises a main body groove extending in the second direction and at least one expansion groove extending in the first direction, positioned at two ends of the main body groove and communicated with the main body groove; the semiconductor island completely covers the groove and comprises a first semiconductor layer extending in the first direction and a second semiconductor layer extending in the second direction, and the second semiconductor layer comprises a second main body semiconductor layer located above the main body groove and a second extended semiconductorlayer covering the extended groove; a gate structure is formed on the second semiconductor layer of the semiconductor island; and the source region and the drain region are formed at two ends of the first semiconductor layer. The expansion grooves communicated with the main body groove are formed in the two ends of the main body groove, so that the leakage resistance is effectively increased, andthe side leakage of the groove is reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, and in particular relates to an SOI field effect transistor with reduced side leakage and a preparation method thereof. Background technique [0002] Field effect transistors on SOI substrates have good anti-single event effects, but because in the SOI structure, the insulating layer (BOX layer) tends to accumulate more positive charges when high-energy particles are incident, the positive charges are caused in the top silicon layer of SOI. The parasitic conductive channel is created, which introduces leakage current and makes the electrical performance of the device drift. This effect is called the total dose effect, and the total dose effect is the main reason for the failure of SOI transistors in the environment of high-energy particle irradiation. Contents of the invention [0003] In view of the shortcomings of the prior art described above, the purpose of the present i...

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Problems solved by technology

[0003] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a SOI field effect transistor with reduced side leakage and a preparation method thereof, which is used to solve the problem that the SOI field effect transistor has a large total dose effect in the prior art. Amplitude response causes problems such as leakage or even failure

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