Hybrid precision space-time multiplexing multiplier based on NAS search and control method of hybrid precision space-time multiplexing multiplier

Abstract

The embodiment of the invention discloses a hybrid precision space-time multiplexing multiplier based on NAS search and a control method of the hybrid precision space-time multiplexing multiplier. Themethod comprises the steps of splitting a first multiplier and a first multiplicand to obtain one or more second multipliers and one or more second multiplicand, wherein the byte quantity of the second multipliers and the byte quantity of the second multiplicand are equal to the calculation byte quantity of each basic calculation unit; generating at least two groups of input parameters accordingto the second multiplier and the second multiplicand, wherein each group of input parameters comprises the second multiplier and the second multiplicand; inputting the at least two groups of input parameters into at least two basic calculation units in a one-to-one correspondence manner to obtain a first calculation result of each group of input parameters; and determining a target result of the first multiplier and the first multiplicand according to the first calculation result. According to the embodiment of the invention, the hybrid precision fixed-point multiply-accumulate calculation issupported through the hybrid serial-parallel design of time and space, so that the data stream is deeply optimized. The working speed of a traditional multiplier is improved, and the required area andenergy consumption are reduced.

Description

technical field [0001] Embodiments of the present invention relate to multiplier technology, in particular to a NAS search-based mixed-precision space-time multiplexing multiplier and a control method thereof. Background technique [0002] NAS (Neural Architecture Search, neural network architecture search algorithm) can traverse the architecture to find the neural network architecture with the best performance according to the design requirements. The parameters and calculation units of the conventional neural network are single precision, and the number of bits required for the multiplier is fixed. [0003] As new energy-efficient neural networks are implemented in a mixed-precision manner, using conventional fixed-bit multipliers suffers from high energy consumption and high latency. The multiplier is an important part of the computing processing unit, and the power consumption and performance of multiplication directly affect the computing performance of the processing u...

AI Technical Summary

Problems solved by technology

[0004] However, the number of input bits of conventional NAS multipliers is fixed and cannot be configured and adjusted according to application requirements, and the calculation process is mostly a single serial structure or parallel structure, which cannot improve data utilization based on time-domain and spatial-domain multiplexing of data. It meets the requirements of mixed-precision computing and cannot reasonably allocate computing resources for specific applications. On the other hand, traditional look-up table multipliers can only be applied to calculations with smaller bit widths, and parallel computing with larger bit widths will dramatically increase the chip area. If you want to reduce the area consumption, you can only exchange time for area consumption in a serial way, but the calculation speed of the serial multiplier is slow, which cannot meet the calculation performance requirements.

Moreover, the conventional single serial structure or parallel structure cannot simultaneously realize time-domain multiplexing and spatial multiplexing of data.

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