A parallel analysis method and system for system-level integrated circuit DC voltage drop

Abstract

The invention discloses a parallel analysis method and system for a system-level integrated circuit DC voltage drop. The parallel analysis method of the invention uses a plurality of coarse particles to conduct parallel analysis according to the principle of random dynamic allocation and first-to-apply first-to-allocate. Each coarse particle Independently and synchronously divide the system-level integrated circuit into the same multiple subsystems in units of layers, perform the same grid division on the entire system-level integrated circuit and establish the same finite element sparse matrix; when processing each subsystem, each A coarse particle is processed for different subsystems, and other subsystems other than this subsystem are merged into the system to be processed, and the internal nodes of the system to be processed are eliminated by repeated use of star-delta transformation, and only the field of this subsystem is obtained. The finite element sparse matrix and solve it greatly simplifies the solution process. On the basis of ensuring the solution accuracy, the solution speed is improved, and the fast and accurate analysis of the DC voltage drop of the system-level VLSI is realized.

Description

technical field [0001] The invention relates to the technical field of system-level integrated circuit analysis, in particular to a parallel analysis method and system for system-level integrated circuit DC voltage drop. Background technique [0002] The DC voltage drop analysis of system-level VLSI is an important task in the back-end verification of integrated circuits. In the design process of the current system-level VLSI, the core power supply voltage of the devices in the integrated circuit continues to decrease, and the tolerance of the allowable voltage is getting smaller and smaller, but the operating current and wiring density of the integrated circuit are getting larger and larger. As a result, the DC voltage drop problem has become increasingly prominent. If the DC voltage drop problem is not considered in the design process of the system-level VLSI, it is likely that the noise margin of the system will decrease due to the DC voltage drop problem, and a small di...

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Problems solved by technology

For system-level VLSI with multi-scale structure, if high-quality meshing is directly performed on the area where the entire system-level VLSI is located, the number of grid nodes generated will reach tens of millions or even hundreds of millions. It is difficult to directly solve the tens of millions or even hundreds of millions of finite element sparse matrices formed by the grid. Even if it can be solved, it will require huge memory and CPU time. For the design of system-level VLSI Said that the time cost is too high, so how to provide a high-precision and speed-block solution method to quickly and accurately analyze the DC voltage drop of the system-level VLSI has become an urgent technical problem to be solved

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