Semiconductor structure and forming method thereof
A semiconductor and gate structure technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of large tungsten plug resistance and unfavorable performance of semiconductor devices
Active Publication Date: 2021-02-09
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
However, the traditional tungsten-filled through-hole process makes the resistance of the tungsten plug larger, which is not conducive to improving the performance of semiconductor devices.
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[0025] It can be seen from the background art that tungsten metal is usually selected as a via filling material due to its excellent gap filling ability and good anti-electromigration properties. The traditional tungsten-filled through-hole process includes: depositing an oxide layer on the provided semiconductor substrate; etching the oxide layer to form a through-hole; depositing an adhesive layer on the oxide layer and the sidewall and bottom of the through-hole ; via SiH 4 and hydrogen gas mixture with WF 6 The source gas reacts to form a thin layer of tungsten on the bonding layer as the growth point of the subsequent tungsten layer; hydrogen and WF 6 The reaction produces a large amount of tungsten film; planarize the tungsten metal.
[0026] The inventors have found that when traditional processes are used to deposit metal tungsten to fill the through hole, usually the tungsten grows from the two sides of the through hole to the middle, which will easily cause gaps in...
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The invention discloses a semiconductor structure and a forming method thereof, and the forming method comprises the steps: providing a substrate which comprises a first region and a second region, and forming a gate structure and a source-drain doped region on the substrate; forming a first interlayer dielectric layer on the substrate; forming a plurality of metal plugs in the first interlayer dielectric layer of the first region; forming a second interlayer dielectric layer on the first interlayer dielectric layer; etching the second interlayer dielectric layer, forming a first through holeexposing the metal plug in the first region, and forming a second through hole exposing the first interlayer dielectric layer in the second region; filling the first through hole with a first tungstenlayer; forming bonding layers on the first tungsten layer, the second interlayer dielectric layer, the side wall of the second through hole and the bottom of the second through hole; and filling thesecond through hole with a second tungsten layer. The first through hole is filled with the first tungsten layer through the selective deposition method, so that the resistance value of the formed tungsten plug is small; and in addition, the second through hole is filled with the second tungsten layer, so that the second interlayer dielectric layer is smooth, and the performance of the semiconductor is improved.
Description
technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In a semiconductor device, reducing the RC delay (Resistance Capacitance Delay) can improve the performance of the semiconductor device. With the advancement of semiconductor process technology nodes, the integration of devices is getting higher and higher, and the critical dimension (CD) of devices is getting smaller and smaller. Correspondingly, further reducing RC delay has become an important measure to improve the performance of semiconductor devices. one. [0003] With the continuous development of semiconductor technology, multi-layer metallization has created the need for hundreds of millions of vias to be filled with metal to form electrical paths between metal layers. Tungsten metal is usually chosen as the via filling material due to its excellent gap filling ability and g...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L21/48H01L21/768H01L23/498H01L23/538
CPCH01L21/486H01L21/76898H01L23/49827H01L23/49805H01L23/5384H01L21/76879H01L21/76877H01L21/7684H01L21/76843H01L21/76849H01L21/28562H01L23/5226H01L23/53257H01L21/28568
Inventor 蒋莉
Owner SEMICON MFG INT (SHANGHAI) CORP