A tdc circuit system using multiple circular delay chains

Abstract

The invention relates to a TDC circuit system adopting multiple circular delay chains, which belongs to the field of time precision measurement. The system includes a delayer, an AND gate circuit and a D flip-flop, and the system introduces the START signal into the delay line of the ring structure at the same time, and then simultaneously introduces the clock port of the D flip-flop on each delay line to delay when the STOP signal comes. The line state is sampled, and the number of passing delay units is calculated. The present invention replaces the first delay unit and the last delay unit of each circular delay line with an AND gate and an inverter, but the delay time is consistent with other delay units by design, so that the structure does not consume other resources. Under the circumstances, the measurement effect achieved by the traditional structure can be achieved by reducing the use of delay units and flip-flops.

Description

technical field [0001] The invention belongs to the field of time precision measurement, and relates to a TDC circuit system adopting multiple circular delay chains. Background technique [0002] TDC (Time to Digital Converters) is time-to-digital conversion technology, also known as time-to-digital converter. It is a professional technology formed by the intersection of multi-disciplinary and multi-technical fields, including physics, mathematics, circuits, signal processing and detection technology. It can process the time interval between two asynchronous signals, convert it into a digital signal and store it, and then transmit the data to the processor for calculation. It plays an extremely important role in precision measurement, and the advanced level of many application fields is closely related to the accuracy of time interval measurement. [0003] In daily life, we do not have particularly high precision requirements for time measurement, but in the field of high-...

AI Technical Summary

Problems solved by technology

The latter has low design cost, short development cycle and good flexibility, but due to the influence of placement and routing delays, the accuracy of TDC based on FPGA is low; while the design method based on ASIC has a long design cycle, but it can achieve higher High test accuracy, which is also one of the current research hotspots

At present, most domestic TDC designs are researched and designed based on FPGA, and there are few dedicated TDC chips for engineering applications.

Images