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Method for forming shallow trench isolation structure

A technology of isolation structure and shallow trench, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve problems such as hot phosphoric acid bumping, and achieve the effect of solving bumping

Pending Publication Date: 2021-03-26
GUANGZHOU CANSEMI TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The object of the present invention is to provide a method for forming a shallow trench isolation structure to solve the problem of hot phosphoric acid bumping in wet etching

Method used

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  • Method for forming shallow trench isolation structure
  • Method for forming shallow trench isolation structure
  • Method for forming shallow trench isolation structure

Examples

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Embodiment 1

[0040] figure 1 It is a schematic flowchart of a method for forming a shallow trench isolation structure according to an embodiment of the present invention. Such as figure 1 As shown, this embodiment provides a method for forming a shallow trench isolation structure, including:

[0041] Step S10, providing a substrate on which a first dielectric layer and a hard mask layer are sequentially formed, a groove is formed in the substrate, and a second dielectric layer and a third dielectric layer are formed in the groove. a dielectric layer, the second dielectric layer covers the bottom and sidewalls of the trench, and the third dielectric layer covers the second dielectric layer and fills up the trench.

[0042] Step S20 , performing a chemical mechanical polishing process to obtain that the height of the third dielectric layer is lower than that of the hard mask layer.

[0043] Step S30 , performing a first wet etching process to remove the hard mask layer.

[0044] Step S40...

Embodiment 2

[0058] An embodiment of the present invention provides a method for forming a shallow trench isolation structure, including:

[0059] Step S10, providing a substrate on which a first dielectric layer and a hard mask layer are sequentially formed, a trench is formed in the substrate, and a second dielectric layer and a third dielectric layer are formed in the trench. a dielectric layer, the second dielectric layer covers the bottom and sidewalls of the trench, and the third dielectric layer covers the second dielectric layer and fills up the trench.

[0060] Step S20, performing a chemical mechanical polishing process to obtain the third dielectric layer having the same height as the hard mask layer.

[0061] Step S30 , performing a first wet etching process to remove the hard mask layer.

[0062] Step S40 , performing a second wet etching process to remove the first dielectric layer to form a shallow trench isolation structure.

[0063] Compared with Embodiment 1, the differ...

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Abstract

The invention provides a method for forming a shallow trench isolation structure, and the method adjusts the height of a third dielectric layer in a trench when a chemical mechanical polishing processis executed, thereby replacing a technical scheme that the height of the third dielectric layer is adjusted through hydrofluoric acid before a hard mask layer removing process through a first wet etching process. According to the method, the problem that an aqueous solution generated when residual hydrofluoric acid on the substrate is cleaned is brought into a solution of the first wet etching process to cause the explosive boiling of hot phosphoric acid is avoided, and the problems that a wafer is scratched and process defects are scrapped due to the abnormal position of the wafer caused byexplosive boiling of the hot phosphoric acid are avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a shallow trench isolation structure. Background technique [0002] With the development trend of high-density integrated circuits, the devices that make up the circuit are placed more closely in the chip to fit the available space of the chip. Correspondingly, the density of active devices per unit area of ​​the semiconductor substrate continues to increase, so effective insulation between devices becomes more important. [0003] Shallow Trench Isolation (STI) technology has good isolation effects (such as process isolation effect and electrical isolation effect), shallow trench isolation technology also has the advantages of reducing the area occupied by the wafer surface and increasing the integration of devices, etc. advantage. Therefore, with the reduction of the size of integrated circuits, shallow trench isolation structures are mainly used fo...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76237H01L21/76224
Inventor 唐斌陈忠奎
Owner GUANGZHOU CANSEMI TECH INC
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