Flash memory chip analysis method and device, electronic equipment and storage medium

A flash memory chip and analysis method technology, applied in the computer field, can solve the problems of unstable use and low service life of flash memory chips, and achieve the effect of improving service life and stability

Inactive Publication Date: 2021-04-02
SHENZHEN SHICHUANGYI ELECTRONICS
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the embodiments of the present invention is to provide an analysis method for flash memory chips, aiming to

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Flash memory chip analysis method and device, electronic equipment and storage medium
  • Flash memory chip analysis method and device, electronic equipment and storage medium
  • Flash memory chip analysis method and device, electronic equipment and storage medium

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0041]Example one

[0042]An flash chip analysis method provided by the first embodiment of the present invention, seefigure 1 The method includes steps S01 to S03:

[0043]Step S01, performing data retention of the flash memory chip via the BCH code.

[0044]Step S02, the memory chip in different states is baked, and the data hold capacity of the physical memory block of the number of different erasions in the flash memory is tested by the BCH code.

[0045]Step S03 records and analyzes the test results of the flash memory chip at multiple time points to obtain the characteristics of the flash chip.

[0046]Specifically, in the present embodiment, the data remaining capability (ie DATARETENTION) test of the flash memory chip of the low erase, wherein the flash memory chip of the low erase is a flash chip, which is completed, and the number of times is small. The number of times is low. When testing, by means of a constant temperature and humidity tank, the control temperature is controlled by 12...

Example Embodiment

[0049]Example 2

[0050]In one embodiment of the invention, please refer tofigure 2 Prior to step S02, the method further includes steps S04 to S05:

[0051]Step S04, burn the firmware program into the flash memory chip.

[0052]Step S05, write the test item data into the flash memory chip.

[0053]Specifically, through the characteristic analysis software, the flash memory chip is burned into the firmware program and the erasing read test of the private command, so that the number of specified physical memory block reaches the required value, and the ECC raw data is used to deposit the constant temperature and humidity box. Static baking simulation actual use of data for one year, two or years.

Example Embodiment

[0054]Example three

[0055]In another embodiment of the invention, the method further comprises the steps of: following the steps of bonding the firmware program into the flash memory chip:

[0056]In step S06, the memory chip in the first state is tested, the first state being a plurality of physical memory blocks in the flash memory chip as unfilled state.

[0057]Specifically, when each of the storage pages of the physical memory block fills the data, the physical memory block is in a closed state; when the physical memory block has some blank storage page, the physical memory block is in an open state;

[0058]In the above manner, simulation When the platform is used, if the write data exceeds one or more physical memory blocks, after the firmware is processed, a part of the flash memory will be closed, some physical storage blocks The data is not full, in an open state, to simulate the normal use status of the flash chip.

[0059]Step S07, test the memory chip in the second state, seeimage ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention is applicable to the technical field of computers, and provides a flash memory chip analysis method and device, electronic equipment and a storage medium. The method comprises the following steps: performing a data retention capability test on a flash memory chip through a BCH code; baking the storage chip in different states, and testing the data retention capability of physical storage blocks with different erasure times in the flash memory chip through the BCH code; and recording and analyzing test results of the flash memory chip at a plurality of time points to obtain characteristics of the flash memory chip. According to the method provided by the invention, the problems of unstable use and short service life of the existing flash memory core in different test scenes and platforms are solved.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to a flash memory chip analysis method, device, electronic equipment and storage medium. Background technique [0002] For the data error correction in the flash memory chip, the two mainstream error correction codes are BCH code and LDPC code. LDPC code (Low Density Parity Check Code, LDPC) is a low density parity check code, which is a linear block code with a sparse check matrix, with low decoding complexity and flexible structure. BCH code (abbreviation of Bose, Ray-Chaudhuri, Hocquenghem) is a cyclic code that can correct multiple random errors. It has a strict algebraic structure and strong error correction capability, especially in short and medium code lengths. It is close to the theoretical value and is one of the linear block codes. [0003] Flash wafers produced by different manufacturers in the market have different processes and quality, and different fl...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G11C29/42G11C29/50
CPCG11C29/42G11C29/50
Inventor 倪黄忠范厚奎
Owner SHENZHEN SHICHUANGYI ELECTRONICS
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap