Read operating circuit, semiconductor memory, and read operating method
A read operation, semiconductor technology, applied in the field of read operation circuit, to achieve the effect of reducing power consumption, compressing current, and reducing the number of flips
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[0079] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus their repeated descriptions will be omitted.
[0080] figure 1 A block diagram schematically showing a partial structure of a semiconductor memory in an implementation manner of this embodiment. Such as figure 1 As shown, the semiconductor memory 20 includes a DQ port 24 , a data line inversion (Data Bus Inversion, DBI) port 25 , a storage block (Bank) 26 and a read operation circuit. Wherein, the read operation circuit includes a global bus (Global Bus), a DBI signal line,...
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