Clock data recovery system and device, storage medium and electronic device
A clock data recovery and clock signal technology, applied in the field of communication, can solve the problem that the clock data recovery device cannot efficiently realize the clock data recovery and so on.
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Embodiment 1
[0038] This embodiment provides a clock data recovery system, figure 1 It is a schematic structural diagram (1) of a clock data recovery system provided according to an embodiment of the present invention, such as figure 1 As shown, the clock data recovery system in this embodiment includes:
[0039] The sampling clock module 102 is configured to generate a first sampling clock signal and a second sampling clock signal;
[0040] The first analog-to-digital conversion module 104 is configured to obtain an analog input signal and a first sampling clock signal, and perform sampling processing on the analog input signal according to the first sampling clock signal to obtain a first output signal;
[0041] The second analog-to-digital conversion module 106 is configured to obtain an analog input signal and a second sampling clock signal, and perform sampling processing on the analog input signal according to the second sampling clock signal to obtain a second output signal;
[00...
specific Embodiment 1
[0066] Figure 4 is a schematic structural diagram of a clock data recovery system provided according to a specific embodiment of the present invention, such as Figure 4 As shown, the clock data recovery system in this specific embodiment includes:
[0067] A first analog-to-digital converter unit 11 , a second analog-to-digital converter unit 12 , a digital phase detection filter unit 13 , a sampling clock generator unit 14 , and a parameter configuration and state control unit 15 .
[0068] During the working process of the above clock data recovery system, such as Figure 4 As shown, the first analog-to-digital converter unit 11 and the second analog-to-digital converter unit 12 respectively receive the input data signal Datain, and simultaneously complete sampling according to the first sampling clock c11 and the second sampling clock c12 generated by the sampling clock generator unit 14 , so as to respectively output the first sample data d11 and the second sample data...
specific Embodiment 2
[0086] Figure 10 It is a schematic circuit diagram of a clock data recovery circuit provided according to a specific embodiment of the present invention, such as Figure 10 As shown, the clock data recovery system in this specific embodiment includes:
[0087] A first analog-to-digital converter 21 , a second analog-to-digital converter 22 , a digital phase detection filter 23 , a sampling clock generator 24 , and a parameter configuration and state controller 25 .
[0088] During the working process of the above clock data recovery system, such as Figure 9 As shown, the first analog-to-digital converter 21 and the second analog-to-digital converter 22 respectively receive the input data Data, and at the same time complete the sampling according to the first sampling clock c21 and the second sampling clock c22 generated by the sampling clock generator 24, to respectively correspond to The first sampling data d21 and the second sampling data d22 are output.
[0089] The ab...
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