Semiconductor packages

Abstract

A package (23) includes a carrier (42) that comprises a first conductive layer (51) on a first side and a second conductive layer (52) on a second side opposite the first side. The first conductive layer (51) comprises wire bonding pads (55). The package (23) also includes a semiconductor die (21) that is flip chip mounted on the first side of the carrier (42). The carrier (42) may comprise vias (54) from the first side to the second side, wherein the vias (54) receive electrical ground from the second conductive layer (52). The first conductive layer (51) may comprise traces electrically connecting the semiconductor die (21) and the wire bonding pads (55). The semiconductor die (21) may be a high frequency radio frequency (RF) die and the first conductive layer (51) may carry RF signals. The semiconductor die (21) may be a silicon-on-insulator (SOI) die. Copper pillars (24) may be placed between the semiconductor die (21) and the carrier (42). Molding material (27) may be disposed around the semiconductor die (21). The carrier (42) may comprise a laminated substrate, a ceramic substrate, or a semiconductor substrate, the semiconductor substrate comprising electronic components and semiconductor device elements or not including any such components or devices fabricated thereon. The package (23) may be attached to a board, such as a printed circuit board (PCB) (62) comprising a first conductive layer (71) and a second conductive layer (72) separated by dielectric (73), wherein the first conductive layer (71) is on a first side of the PCB (62). The PCB (62) may include a recess (65) on the first side and extending through the first conductive layer (71) and the dielectric (73) to the second conductive layer (72), wherein the carrier (42) is positioned in the recess (65) of the PCB (62), and wherein the second conductive layer (52) of the carrier (42) is electrically connected to the second conductive layer (72) of the PCB (62) in the recess (65) by an epoxy (63) that is both thermally and electrically conductive. The semiconductor die (21) may receive electrical ground from the second conductive layer (72) of the PCB (62) by way of the carrier (42). Pads (71a) on the first conductive layer (71) of the PCB (62) may be connected to corresponding pads (55) on the first conductive layer (51) of the carrier (42) by wires or ribbons (67, 68).

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Provisional Application No. 62 / 647,549, filed March 23, 2018, entitled "Semiconductor Packages," the entire disclosure of which is hereby incorporated by reference for all purposes. technical field [0003] The field relates to semiconductor packaging. Background technique [0004] Attaching a semiconductor die to a board by flip-chip bonding requires expensive alignment and robotic equipment, which can be inconvenient for the end user. On the other hand, wire bonding techniques may not provide sufficient performance, especially for radio frequency (RF) applications where the semiconductor die handles high frequency signals. Accordingly, there is a continuing need for improved semiconductor packaging. Contents of the invention [0005] In one aspect, packaging is disclosed. The package includes a carrier including a first conductive layer on a first side and a second con...

AI Technical Summary

Problems solved by technology

[0004] Attaching the semiconductor die to the board by flip-chip bonding requires expensive alignment and robotic equipment, which can be inconvenient for the end user

On the other hand, wire bonding techniques may not provide sufficient performance, especially for radio frequency (RF) applications where the semiconductor die handles high frequency signals

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