A fast and accurate method for measuring junction temperature of cascode structure gan power electronic devices
A power electronic device, accurate measurement technology, applied in the direction of single semiconductor device testing, measuring electricity, measuring devices, etc.
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Embodiment 1
[0037] The present invention proposes a method for rapid and accurate measurement of the junction temperature of a Cascode structure GaN power electronic device, the method by applying two bias currents of different sizes at both ends of the device source leakage under the off-state condition of the Cascade structure GaN power electronic device, measuring the bias voltage value, and then obtaining the temperature-sensitive electrical parameter ΔR Si This parameter is only related to two different test currents and measured bias voltages, eliminating the GaN HEMT on-resistance R in the test loop in series with the Si MOSFET body diode GaN Effect on the linearity of the temperature-sensitive relationship. By the temperature sensitive electrical parameter ΔR Si A completely linear correspondence to temperature allows for accurate characterization of the device junction temperature. Testing processes such as Figure 1 as shown.
[0038] Conventional Cascade structural power electronics...
Embodiment 2
[0055] The present invention precisely measures the Cascode structure GaN power electronic device junction temperature specific embodiments are described below:
[0056] Step (1): Set up a temperature curve calibration platform. as Figure 6 As shown, the device under test is placed in a regulated and stable temperature environment, and the source drain of the device under test is connected to the test system via an external cable. The cable resistance is outside the variable temperature environment, and its resistance value is fixed, which does not affect the linearity of the temperature curve. The test system can be a source meter with a current source function or a combination of a current source and a voltmeter. The test method proposed in this patent application is off-state testing, so there is no need to design additional gate drive circuitry.
[0057] Step (2): Calibrate the device temperature profile by means of external heating. The ambient temperature of the device is se...
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